On Wed, Jul 5, 2017, 6:56 AM Schoenwald, Adam J. (GSFC-5640) <
adam.schoenw...@nasa.gov> wrote:

> Hi All,
>
> I’ve abandoned my attempt to use the DRAM for now and moved on to QDR.
>
> I’m somewhat confused by the wiki  at https://casper.berkeley.edu/wiki/Qdr
> .
>
>
>
> The “issuing commands section” says that one type of command cannot be
> issued in two consecutive cycles.
>
> The “bursting” section says that data for both read and write is presented
> for two cycles, and that data_in and be must be set for both of those
> cycles.
>
>
>
> Does this mean that a “write event” lasts for two clock cycles?
>
> If so, can data_in change from the first clock cycle to the second,
> storing a total of 144 bits over two cycles?
>

Correct. I believe there is a qdr transpose block in the library which may
be a useful reference design.

Cheers
Jack

>
>
> Thanks,
>
> --Adam
>
>
>
> ----------------------------------------------------
>
> Adam Schoenwald - Electrical Engineer
>
> ----------------------------------------------------
>
>
>
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