On Thu, Mar 23, 2017 at 11:25:49AM -0700, kan.li...@intel.com wrote: > From: Kan Liang <kan.li...@intel.com> > > When setting FREEZE_WHILE_SMM bit in IA32_DEBUGCTL, all performance > counters will be effected. There is no way to do per-counter freeze > on smi. So it should not use the per-event interface (e.g. ioctl or > event attribute) to set FREEZE_WHILE_SMM bit. > > Adds sysfs entry /sys/device/cpu/freeze_on_smi to set FREEZE_WHILE_SMM > bit in IA32_DEBUGCTL. When set, freezes perfmon and trace messages > while in SMM. > Value has to be 0 or 1. It will be applied to all possible cpus.
So is there ever a good reason to not set this?
