On 26/04/17 02:53 PM, Gerd Hoffmann wrote:
> On Di, 2017-04-25 at 12:18 +0900, Michel Dänzer wrote:
>> On 24/04/17 03:25 PM, Gerd Hoffmann wrote:
>>> Return correct fourcc codes on bigendian. Drivers must be adapted to
>>> this change.
>>>
>>> Signed-off-by: Gerd Hoffmann <kra...@redhat.com>
>>
>> Just to reiterate, this won't work for the radeon driver, which programs
>> the GPU to use (effectively, per the current definition that these are
>> little endian GPU formats) DRM_FORMAT_XRGB8888 with pre-R600 and
>> DRM_FORMAT_BGRX8888 with >= R600.
>
> Hmm, ok, how does bigendian fbdev emulation work on pre-R600 then?
Using a GPU byte swapping mechanism which only affects CPU access to
video RAM.
>>> +#ifdef __BIG_ENDIAN
>>> + switch (bpp) {
>>> + case 8:
>>> + fmt = DRM_FORMAT_C8;
>>> + break;
>>> + case 24:
>>> + fmt = DRM_FORMAT_BGR888;
>>> + break;
>>
>> BTW, endianness as a concept cannot apply to 8 or 24 bpp formats.
>
> I could move the 8 bpp case out of the #ifdef somehow, but code
> readability will suffer then I think ...
How so?
At least it would make clearer which formats are affected by endianness
and which aren't.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
