[PATCH v5 09/14] MIPS: JZ4780: CI20: Add pinctrl configuration for several drivers

[Paul Cercueil]

We set the pin configuration for the jz4780-nand and jz4780-uart
drivers.

Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
 arch/mips/boot/dts/ingenic/ci20.dts | 60 +++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

 v2: Changed the devicetree bindings to match the new driver
 v3: No changes
 v4: No changes
 v5: No changes

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts 
b/arch/mips/boot/dts/ingenic/ci20.dts
index 1652d8d60b1e..fd138d9978c1 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -29,18 +29,30 @@
 
 &uart0 {
        status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_uart0>;
 };
 
 &uart1 {
        status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_uart1>;
 };
 
 &uart3 {
        status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_uart2>;
 };
 
 &uart4 {
        status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pins_uart4>;
 };
 
 &nemc {
@@ -61,6 +73,13 @@
                ingenic,nemc-tAW = <15>;
                ingenic,nemc-tSTRV = <100>;
 
+               /*
+                * Only CLE/ALE are needed for the devices that are connected, 
rather
+                * than the full address line set.
+                */
+               pinctrl-names = "default";
+               pinctrl-0 = <&pins_nemc>;
+
                nand@1 {
                        reg = <1>;
 
@@ -69,6 +88,9 @@
                        nand-ecc-mode = "hw";
                        nand-on-flash-bbt;
 
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pins_nemc_cs1>;
+
                        partitions {
                                compatible = "fixed-partitions";
                                #address-cells = <2>;
@@ -106,3 +128,41 @@
 &bch {
        status = "okay";
 };
+
+&pinctrl {
+       pins_uart0: uart0 {
+               function = "uart0";
+               groups = "uart0-data";
+               bias-disable;
+       };
+
+       pins_uart1: uart1 {
+               function = "uart1";
+               groups = "uart1-data";
+               bias-disable;
+       };
+
+       pins_uart2: uart2 {
+               function = "uart2";
+               groups = "uart2-data", "uart2-hwflow";
+               bias-disable;
+       };
+
+       pins_uart4: uart4 {
+               function = "uart4";
+               groups = "uart4-data";
+               bias-disable;
+       };
+
+       pins_nemc: nemc {
+               function = "nemc";
+               groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", 
"nemc-frd-fwe";
+               bias-disable;
+       };
+
+       pins_nemc_cs1: nemc-cs1 {
+               function = "nemc-cs1";
+               groups = "nemc-cs1";
+               bias-disable;
+       };
+};
-- 
2.11.0