[Mesa-dev] [PATCH 1/2] radeonsi: check nr_cbufs in other places before flushing CB

[Marek Olšák]

From: Marek Olšák <marek.ol...@amd.com>

---
 src/gallium/drivers/radeonsi/si_state.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index b236bed..a674a60 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3968,21 +3968,22 @@ static void si_set_tess_state(struct pipe_context *ctx,
 
        si_set_rw_buffer(sctx, SI_HS_CONST_DEFAULT_TESS_LEVELS, &cb);
        pipe_resource_reference(&cb.buffer, NULL);
 }
 
 static void si_texture_barrier(struct pipe_context *ctx, unsigned flags)
 {
        struct si_context *sctx = (struct si_context *)ctx;
 
        /* Multisample surfaces are flushed in si_decompress_textures. */
-       if (sctx->framebuffer.nr_samples <= 1) {
+       if (sctx->framebuffer.nr_samples <= 1 &&
+           sctx->framebuffer.state.nr_cbufs) {
                sctx->b.flags |= SI_CONTEXT_INV_VMEM_L1 |
                                 SI_CONTEXT_INV_GLOBAL_L2 |
                                 SI_CONTEXT_FLUSH_AND_INV_CB;
        }
        sctx->framebuffer.do_update_surf_dirtiness = true;
 }
 
 /* This only ensures coherency for shader image/buffer stores. */
 static void si_memory_barrier(struct pipe_context *ctx, unsigned flags)
 {
@@ -4014,21 +4015,22 @@ static void si_memory_barrier(struct pipe_context *ctx, 
unsigned flags)
                 * L1 isn't used.
                 */
                if (sctx->screen->b.chip_class <= CIK)
                        sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
        }
 
        /* MSAA color, any depth and any stencil are flushed in
         * si_decompress_textures when needed.
         */
        if (flags & PIPE_BARRIER_FRAMEBUFFER &&
-           sctx->framebuffer.nr_samples <= 1) {
+           sctx->framebuffer.nr_samples <= 1 &&
+           sctx->framebuffer.state.nr_cbufs) {
                sctx->b.flags |= SI_CONTEXT_FLUSH_AND_INV_CB |
                                 SI_CONTEXT_WRITEBACK_GLOBAL_L2;
        }
 
        /* Indirect buffers use TC L2 on GFX9, but not older hw. */
        if (sctx->screen->b.chip_class <= VI &&
            flags & PIPE_BARRIER_INDIRECT_BUFFER)
                sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
 }
 
-- 
2.7.4

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