Hi Sasha,
Thanks for the reveiw.
On Friday 03 February 2017 12:24 AM, Sasha Levin wrote:
On Mon, Jan 30, 2017 at 7:30 AM, George Cherian
<george.cher...@cavium.com> wrote:
diff --git a/drivers/crypto/cavium/cpt/cptvf_main.c
b/drivers/crypto/cavium/cpt/cptvf_main.c
new file mode
On Friday 03 February 2017 11:02 PM, Sasha Levin wrote:
On Mon, Jan 30, 2017 at 7:30 AM, George Cherian
<george.cher...@cavium.com> wrote:
This series adds the support for Cavium Cryptographic Accelerarion Unit (CPT)
CPT is available in Cavium's Octeon-Tx SoC series.
The series was
cro definitions
-- Remove the redundant ROUNDUP* macros and use kernel function
-- Select proper config option in Kconfig file.
-- Removed some of the unwanted header file inclusions
-- Miscellaneous Cleanup
George Cherian (3):
drivers: cryp
Enable the Physical Function driver for the Cavium Crypto Engine (CPT)
found in Octeon-tx series of SoC's. CPT is the Cryptographic Accelaration
Unit. CPT includes microcoded GigaCypher symmetric engines (SEs) and
asymmetric engines (AEs).
Signed-off-by: George Cherian <george.cher...@cavium.
Enable the CPT VF driver. CPT is the cryptographic Acceleration Unit
in Octeon-tx series of processors.
Signed-off-by: George Cherian <george.cher...@cavium.com>
Reviewed-by: David Daney <david.da...@cavium.com>
---
drivers/crypto/cavium/cpt/Makefile | 3 +-
drivers/crypt
Add the CPT options in crypto Kconfig and update the
crypto Makefile
Update the MAINTAINERS file too.
Signed-off-by: George Cherian <george.cher...@cavium.com>
Reviewed-by: David Daney <david.da...@cavium.com>
---
MAINTAINERS | 7 +++
drivers/crypto/Kconfig |
definitions
-- Remove the redundant ROUNDUP* macros and use kernel function
-- Select proper config option in Kconfig file.
-- Removed some of the unwanted header file inclusions
-- Miscellaneous Cleanup
George Cherian (3
Enable the Physical Function driver for the Cavium Crypto Engine (CPT)
found in Octeon-tx series of SoC's. CPT is the Cryptographic Accelaration
Unit. CPT includes microcoded GigaCypher symmetric engines (SEs) and
asymmetric engines (AEs).
Signed-off-by: George Cherian <george.cher...@cavium.
Enable the CPT VF driver. CPT is the cryptographic Acceleration Unit
in Octeon-tx series of processors.
Signed-off-by: George Cherian <george.cher...@cavium.com>
Reviewed-by: David Daney <david.da...@cavium.com>
---
drivers/crypto/cavium/cpt/Makefile | 3 +-
drivers/crypt
Add the CPT options in crypto Kconfig and update the
crypto Makefile
Signed-off-by: George Cherian <george.cher...@cavium.com>
Reviewed-by: David Daney <david.da...@cavium.com>
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile | 1 +
2 files changed, 2 insertions(+)
ed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/cavium/cpt/cptpf_mbox.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/cavium/cpt/cptpf_mbox.c
b/drivers/crypto/cavium/cpt/cptpf_mbox.c
index 5818b41..20f2c6e 100644
--- a/drivers/c
Fix the following smatch errors
cptvf_reqmanager.c:333 do_post_process() warn: variable dereferenced
before check 'cptvf'
cptvf_main.c:825 cptvf_remove() error: we previously assumed 'cptvf'
could be null
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: George C
.
Can you please test it and make sure it goes in before the end of the
merge window so that no more users of the old API hit mainline?
Yes the changes works well.
Acked-by: George Cherian <george.cher...@cavium.com>
for the series.
Hi David,
Thanks for the review.
On Saturday 19 November 2016 12:25 AM, David Daney wrote:
On 11/18/2016 07:00 AM, gcheri...@gmail.com wrote:
From: George Cherian <george.cher...@cavium.com>
Enable the Physical Function diver for the Cavium Crypto Engine (CPT)
found in Octeon-tx
Enable the Physical Function diver for the Cavium Crypto Engine (CPT)
found in Octeon-tx series of SoC's. CPT is the Cryptographic Acceleration
Unit. CPT includes microcoded GigaCypher symmetric engines (SEs) and
asymmetric engines (AEs).
Signed-off-by: George Cherian <george.cher...@cavium.
Add the CPT options in crypto Kconfig and update the
crypto Makefile
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
Enable the CPT VF driver. CPT is the cryptographic Accelaration Unit
in Octeon-tx series of processors.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/cavium/cpt/Makefile | 3 +-
drivers/crypto/cavium/cpt/cptvf.h| 145
drivers/
ros and use kernel function
-- Select proper config option in Kconfig file.
-- Removed some of the unwanted header file inclusions
-- Miscellaneous Cleanup
George Cherian (3):
drivers: crypto: Add Support for Octeon-tx CPT Engine
driv
Hi,
I got few review comments for this series from David Daney.
I am reworking on this series and will sent v3 once it is done.
So,kindly ignore this series
Regards,
-George
On 12/13/2016 07:33 PM, George Cherian wrote:
This series adds the support for Cavium Cryptographic Accelerarion Unit
Hi Stephan,
On 01/11/2017 06:09 PM, Stephan Müller wrote:
Am Mittwoch, 11. Januar 2017, 16:58:17 CET schrieb George Cherian:
Hi George,
I will add a seperate function for xts setkey and make changes as following.
...
+
+struct crypto_alg algs[] = { {
+ .cra_flags
Hi Stephan,
Thank you for the clarification.
Regards,
-George
On 01/12/2017 04:49 PM, Stephan Müller wrote:
Am Donnerstag, 12. Januar 2017, 16:40:32 CET schrieb George Cherian:
Hi George,
Sure, please do not forget to invoke xts_verify_key.
Should I be using xts_check_key
s Cleanup
George Cherian (3):
drivers: crypto: Add Support for Octeon-tx CPT Engine
drivers: crypto: Add the Virtual Function driver for CPT
drivers: crypto: Enable CPT options crypto for build
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile
Enable the Physical Function driver for the Cavium Crypto Engine (CPT)
found in Octeon-tx series of SoC's. CPT is the Cryptographic Accelaration
Unit. CPT includes microcoded GigaCypher symmetric engines (SEs) and
asymmetric engines (AEs).
Signed-off-by: George Cherian <george.cher...@cavium.
Add the CPT options in crypto Kconfig and update the
crypto Makefile
Signed-off-by: George Cherian <george.cher...@cavium.com>
Reviewed-by: David Daney <david.da...@cavium.com>
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile | 1 +
2 files changed, 2 insertions(+)
Enable the CPT VF driver. CPT is the cryptographic Acceleration Unit
in Octeon-tx series of processors.
Signed-off-by: George Cherian <george.cher...@cavium.com>
Reviewed-by: David Daney <david.da...@cavium.com>
---
drivers/crypto/cavium/cpt/Makefile | 3 +-
drivers/crypt
Hi Stephan,
Thanks for pointing it out!!
On 01/11/2017 04:42 PM, Stephan Müller wrote:
Am Mittwoch, 11. Januar 2017, 10:56:50 CET schrieb George Cherian:
Hi George,
+int cvm_enc_dec_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
+ u32 keylen)
+{
+ struct
:
From: George Cherian <george.cher...@cavium.com>
Enable the Physical Function diver for the Cavium Crypto Engine (CPT)
typo driver
okay
found in Octeon-tx series of SoC's. CPT is the Cryptographic Acceleration
Unit. CPT includes microcoded GigaCypher symmetric engines (SEs) and
asym
Hi Corentin,
On 12/21/2016 07:31 PM, Corentin Labbe wrote:
Hello
I have some comment inline
On Wed, Dec 21, 2016 at 11:56:12AM +, george.cher...@cavium.com wrote:
From: George Cherian <george.cher...@cavium.com>
Enable the CPT VF driver. CPT is the cryptographic Accelaratio
Remove the individual encrypt/decrypt function for easch algorithm.
This is in prepration of adding more crypto algorithms supported by
hardware. While at that simplify create_ctx_hdr/create_input_list
function interfaces.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
This series adds more algorithem support for CPT.
Add support for
-ecb(aes)
-cfb(aes)
-ecb(des3_ede)
Some cleanups too.
George Cherian (3):
crypto: cavium: Downgrade the annoying misc interrupt print from
dev_err to dev_dbg
crypto: cavium: Remove the individual
Add more algorithm support for the driver.
Add support for ecb(aes), cfb(aes) and ecb(des3_ede).
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/cavium/cpt/cptvf_algs.c | 63 ++
1 file changed, 63 insertions(+)
diff --git a/d
Mailbox interrupt is common and it is not an error interrupt.
So downgrade the print from dev_err to dev_dbg.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/cavium/cpt/cptvf_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
Hi Herbert,
Ping on this series
Regards,
-George Cherian
On Thu, May 4, 2017 at 5:04 PM, George Cherian
<george.cher...@cavium.com> wrote:
> This series adds more algorithm support for CPT.
> Add support for
> -ecb(aes)
> -cfb(aes)
> -ecb(des3_e
Add more algorithm support for the driver.
Add support for ecb(aes), cfb(aes) and ecb(des3_ede).
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/cavium/cpt/cptvf_algs.c | 81 ++
1 file changed, 81 insertions(+)
diff --git a/d
Remove the individual encrypt/decrypt function for easch algorithm.
This is in prepration of adding more crypto algorithms supported by
hardware. While at that simplify create_ctx_hdr/create_input_list
function interfaces.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
This series adds more algorithem support for CPT.
Add support for
-ecb(aes)
-cfb(aes)
-ecb(des3_ede)
Some cleanups too.
George Cherian (3):
crypto: cavium: Downgrade the annoying misc interrupt print from
dev_err to dev_dbg
crypto: cavium: Remove the individual
Mailbox interrupt is common and it is not an error interrupt.
So downgrade the print from dev_err to dev_dbg.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/crypto/cavium/cpt/cptvf_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
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