> But the EIP has to access the instructions. After the mov, you're
> still at low memory. Paging is turned on at this time. The JMP is
> running at 0x10000something. So you turn paging on and do a jump, but
> paging is on when you do the jmp and fetch from low memory. To make
> the ifetch work you have to have the low map on.
>
> I'll look at that code tonight again to make sure I'm not imaging
> things, but I think this is right.
>
> ron
that sounds logical to me, i was thinking that this would work because
the processor had already fetched the next instruction. but, duh,
mov x, crn
is a serializing instruction. (amd arch reference, vol 3, p. 280.)
thanks.
- erik
