On Sat, Dec 12, 2009 at 01:14:09AM -0500, Gregory Maxwell wrote: > On Sat, Dec 12, 2009 at 12:59 AM, sascha <[email protected]> wrote: > > The ADC Converters on the USRP and USRP2 are capable of > > sampling a 32 and 100 mhz spectrum respectively. > > Hm? No. > > 64 and 128mhz -some offset for rolloff around the edges. > > USRP has two RX, each with two 64msample/sec ADCs; USRP2 has one RX with two > 128msample/sec ADCs... each are doing complex sampling, so the bandpass > is equal to the sample rate. > > I don't know if the DBRSRX can go wider than about 60MHz, though. > > Of course, the wider bandwidths aren't relevant without a lot of FPGA > development, which is time consuming and which is especially difficult > for USRP1 because the FPGA is not very large.
is there some code that does the individual downsampling of 200khz wide bands? if so how many instances fit on the FPGA of a USRP1/2? if not, how long does it take to write it? _______________________________________________ A51 mailing list [email protected] http://lists.lists.reflextor.com/cgi-bin/mailman/listinfo/a51
