***Sincere Apologies for Cross Posting*** ESNW/MRCCS Seminar Announcement
"Cell Processors: Motivation, Architecture, Design, Programming and Applications " Thursday 22nd September 2005, 1400-1500 BST (UTC/GMT + 1 hour) Venue: Room 1.10 (ESNW Access Grid) Kilburn Building Guest Chair andrew.m.jo...@manchester.ac.uk Access Grid joining instructions can be found by following the seminar link at: http://www.esnw.ac.uk/ --- Dr. H. Peter Hofstee Chief architect of the Cell Synergistic Processor and Cell chief scientist. IBM Systems and Technology Group This talk will present the Cell processor, jointly developed by the STI partnership. Cell is a non-homogeneous chip multiprocessor intended for general-purpose applications but with a particular emphasis on multimedia performance. The Cell processor combines a 64bit Power Architecture(TM) core with 8 Synergistic Processors. In many cases delivers more than an order of magnitude more performance than conventional PC processors. Cell achieves this performance and power efficiency improvement by a new division of labor between the Power core and the Synergistic Processors. Cell allows for a wide variety of programming models, a selection of which will be presented in this talk. We will end the talk by discussing some applications that seem to fit the Cell processor particularly well, and by indicating areas of further exploration. --- Dr Lee Margetts High Performance Computing University of Manchester http://www.sve.man.ac.uk/General/Staff/margetts
