http://bugzilla.kernel.org/show_bug.cgi?id=5303





------- Additional Comments From [EMAIL PROTECTED]  2006-01-31 08:32 -------
When the processor sees a C2 Stop Clock, it generates a Stop Grant message to 
the SB. In such a situation an interrupt that is pending can only be serviced 
after the processor sees a stop clock deaasertion message. This might add 
latency to the interrupt service and hence the warning messages reported by 
Linux. There are 2 ways to get around this - 
1. Interrupt pending message - AMD 64 architecture has implemented an MSR 
which when setup by the BIOS enables our processor to generate an interrupt 
pending hypertransport message to the SB when an interrupt is pending and a 
stop clock is recieved by the processor. This message is followed by the stop 
grant message by the processor. The SB is then supposed to generate a stop 
clock deassert immidiately allowing the processor to service this pending 
interrupt.
2. Some new SB's do not require the interrupt pending message as they perceive 
that an interrupt is pending when a stop clock was sent and hence generate a 
wakeup event and/or stop clock deassert allowing the processor to handle this 
pending interrupt.

I would suggest getting in touch with your hardware manufacturer (HP?) and 
finding out if any of the above are supported.

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