https://bugzilla.kernel.org/show_bug.cgi?id=213023
--- Comment #59 from CUI Hao (cuihao....@gmail.com) --- (In reply to Takehiko Abe from comment #57) > "Enable/Disable Intel Speed Shift Technology support. Enabling will expose > the CPPC v2 interface to allow for hardware controlled P-sates." > > When I first got the error messages with 5.12.6 last year, I confirmed that > the error messages disappears with CPPC v2 option disabled. But disabling > CPPC v2 support is not a way to go, I guess? > > I believe ASRock B460M also supports CPPCv2. I mentioned the same observation in Bug 216070 that acpi_cppc interface is gone. I just looked my ASRock B460M-ITX's firmware settings. You are right, the option "Enable/Disable Intel Speed Shift Technology support" has the same help message. But I don't know if the bug / current fix disables any function that had worked before. Based on various online resources, my understanding is "Intel Speed Shift" = HWP (Hardware P-state) in Linux, and I can see kernel message say it always works (intel_pstate: HWP enabled). (In reply to Mario Limonciello (AMD) from comment #58) > Are you sure it actually worked before? The firmware masking it does not > give me confidence it really worked. I can confirm /sys/devices/system/cpu/cpuX/acpi_cppc/ exists before 5.17.2 when the error hadn't been introduced. But I don't know if things in it were actually usable. Is there anything I can do to test if CPPCv2 works on old kernels? -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. _______________________________________________ acpi-bugzilla mailing list acpi-bugzilla@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/acpi-bugzilla
