Sebastian Smolorz wrote:
> Hi,
> 
> we all know that the latency test should not be run with a period of 100 us 
> because it easily gets locked up. The attached trace illustrates this problem 
> in detail. It shows that a timer interrupt needs about 50 us to be processed. 
> Furthermore, there is not enough time between two timer interrupts for the 
> latency task to get all its work done.

A minimum of 50 us is maybe a little bit pessimistic, probably the
effect of the instrumentation itself. But it is true that it is easy to
get high maximum latencies when running the cache calibrator in the
background.

> 
> The current I-pipe tracer patch for ARM is available at 
> http://opensource.emlix.com/ipipe-s3c24xx/download/ipipe-tracer-arm.patch_v4
> 
> Comments welcome.


This tracer for arm is great.

-- 
                                                 Gilles Chanteperdrix

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