Hello, I read a suggestion Michael Neuhauser made on a web page to enable dcache write through on arm9 processors to improve real time latency on the ARM CPU.
I tried this on a cirrus EP9302 (ARM 920T) on a TS-7400 board and it does improve the worst case latency dramaticaly but it causes ramdom segmentation violations (init process on a idle machine and also user started processes) I was wondering if any one has heard of problems on this specific processor when CONFIG_CPU_DCACHE_WRITETHROUGH=y with linux kernel 2.4.26 and ADEOS The problem only happens when ADEOS patches are applied together with CONFIG_CPU_DCACHE_WRITETHROUGH=y. Having the dcache write through enabled without adeos patches works fine. Please let me know if I missed something. Thank You Patrick Robin _______________________________________________ Adeos-main mailing list [email protected] https://mail.gna.org/listinfo/adeos-main
