A non trivial problem would be to find a minimal NOR network with a 33 bit input and 1 bit output such that for binary input n, the output is the n'th bit of enwik9.
On Fri, Oct 15, 2021, 1:38 PM James Bowery <[email protected]> wrote: > Good catch with that reductio ad trivialum of my specification, Matt. > Your proposed continually varying voltage to produce a serial output would > still work, although not accomplishing quite what I wanted to with the > parallel input being "compressed" into a serial representation and then > decompressed. I'll have to probe my subconscious for what my intuition was > trying to get at but sometimes the Big Fish remain submerged. > > On Fri, Oct 15, 2021 at 10:06 AM Matt Mahoney <[email protected]> > wrote: > >> Using pure logic (no time delays) you could construct a logic circuit >> that outputs 1 when the input is enwik9 and 0 otherwise. It would consist >> of a single NOR gate with 8 x 10^9 inputs and an inverter for each 1 bit of >> enwik9. You could also construct a logic circuit that outputs enwik9 when >> the input is 1. It would consist of inverters for each 0 bit of enwik9. >> >> This meets the requirements for the Hutter prize because the compressor >> is not required to work on inputs other than enwik9. However, it does not >> compress because the description length of the circuit is longer than 1 GB. >> >> On Thu, Oct 14, 2021, 9:35 PM James Bowery <[email protected]> wrote: >> >>> With parallel input of all bits in the "corpus" to the circuit, there is >>> no directionality (other than the input to output mapping for each bit) >>> except insofar as information dynamics dictates so as to create the serial, >>> compressed (multplexed), bitstream that "represents" the corpus but does so >>> in such a way as to not suboptimal burden on the decompressing >>> (demultiplexing) circuit that must produce exactly the same parallel bits >>> in the same order. >>> >>> So a better description than "prediction" of "letters" (really just >>> bits) would be "imputation" of "letters". >>> >>> There _is_ something of practical importance here: >>> >>> Circa 2000 Federico Faggin funded The Boundary Institute to look at >>> applying George Spencer Brown's Laws of Form notion of imaginary logic >>> states ("This statement is false.") to circuit optimization, as GS Brown >>> had done originally with his railroad car counter patent back circa 1960. >>> Unfortunately, the work there (Tom Etter's solid work in that area >>> previously supported by Paul Allen and then myself at HP) got side-tracked >>> into paranormal research when it appeared that the quantum theory (not yet >>> developed to the point it needed to be for DCG n-NOR circuits) was rigorous >>> enough to provide, for the first time in paranormal research history, >>> testable hypotheses. Big Names showed up and the whole enterprise lost its >>> focus on Faggin's priority. >>> >>> On Thu, Oct 14, 2021 at 2:56 PM <[email protected]> wrote: >>> >>>> So that goal is to make an actual circuit (or simulated circuit) made >>>> of wires and resistors to be NOR functions so that you can send 1 input >>>> signal in and pop out enwik9 the closer it reaches to a single of 1 but >>>> using as few NORs and wires as can? So it is like some sort of brute force >>>> approach? I'm not getting it still... >>>> >>>> Is the goal predicting the next letter? What is the goal, and how is it >>>> evaluated. Why not if not though... >>>> >>> *Artificial General Intelligence List <https://agi.topicbox.com/latest>* > / AGI / see discussions <https://agi.topicbox.com/groups/agi> + > participants <https://agi.topicbox.com/groups/agi/members> + > delivery options <https://agi.topicbox.com/groups/agi/subscription> > Permalink > <https://agi.topicbox.com/groups/agi/T728994814c1a40a0-M2b09bd16b545d2b926dc1bab> > ------------------------------------------ Artificial General Intelligence List: AGI Permalink: https://agi.topicbox.com/groups/agi/T728994814c1a40a0-Ma565c384c89f86cf2c662a71 Delivery options: https://agi.topicbox.com/groups/agi/subscription
