On Wed, Feb 09, 2005 at 11:13:18PM +0800, Yan King Yin wrote:

> I guess one problem (I'm doing neural network stuff) is
> whether the *main* memory access rate can be increased
> by using the Cell.  If each subprocessor can access the
> main memory independently that'd be a huge performance
> boost.

There could be several models to use the architecture effectively. 
One would be streaming through main memory, and doing lots of operations on
the local on-die window. 2 MBytes on-die is a lot of core. All of this would
have to be done manually.

The network could very well be locally constrained and/or simulate the
long-range through interim hops. This would limit array dimensionality, and
thus allow you to arrange your prefetches from main core with a good duty
cycle in regards to streaming vs. random access.

Another approach would be do cluster invididual Cell boxes in a 3d torus, and
largely disregard off-die memory. This would absolutely require a signalling
interconnect with very large bandwidth and ~us latency.
 
> The 256K local memory is not entirely ideal because,

It's 8x256, explicitly-addressed.

> like the brain, most useful neural networks need to
> address the entire set of weights within relatively
> short periods, ie you can't just play with a local
> set of weights for a long time.  It has to be global.

I think you have to work with relative offsets (tighter encoding too) on a 3d
or 4d grid, with connection density rapidly decaying with distance. This maps
very well to a torus.
 
> Still, there'll be at least 8x more processors in each
> cell, and that certainly helps in terms of concurrency.

Yes. Still, so far this is vaporware. This might ship in quantities in two
years, or not at all.

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