Sorry, forgot to mention: include/generated/asm-offsets.h

On Thu, Dec 3, 2015 at 3:40 PM, Davide Libenzi <[email protected]> wrote:

> On Thu, Dec 3, 2015 at 9:08 AM, Barret Rhoden <[email protected]>
> wrote:
>
>>  .text
>>  _alltraps:
>>         cld
>> -       swapgs                  # harmless if we were already in the
>> kernel
>>         pushq %r15
>>         pushq %r14
>>         pushq %r13
>> @@ -367,32 +366,14 @@ _alltraps:
>>         pushq %rbx
>>         pushq %rax
>>         cmpw $GD_KT, 0x90(%rsp) # 0x90 - diff btw tf_cs and tf_rax
>>
>
> Look at what Linux does for those magic offsets. They are auto-generated
> from proper C structs.
> This have the twofold advantage that changes to structure do not cause ASM
> breakages, and they also have nice names, WRT magic numbers.
>
>
> +       je trap_all_tf
>> +       # this is a user TF.  we need to swapgs to get the kernel's gs
>> and mark the
>> +       # context as partial
>> +       swapgs                                  # user's GS is now in
>> MSR_KERNEL_GS_BASE
>> +       movl $0x1, 0xac(%rsp)   # 0xac - diff btw tf_padding0 and tf_rax
>>
>
> Ditto.
>
>
> @@ -436,32 +416,14 @@ _allirqs:
>>         pushq %rbx
>>         pushq %rax
>>         cmpw $GD_KT, 0x90(%rsp) # 0x90 - diff btw tf_cs and tf_rax
>>
>
> Ditto.
>
>
> +       # this is a user TF.  we need to swapgs to get the kernel's gs and
>> mark the
>> +       # context as partial
>> +       swapgs                                  # user's GS is now in
>> MSR_KERNEL_GS_BASE
>> +       movl $0x1, 0xac(%rsp)   # 0xac - diff btw tf_padding0 and tf_rax
>>
>
> Ditto.
>
>
>         # cld is handled by the SFMASK
>> -       swapgs
>> +       swapgs                                  # user's GS is now in
>> MSR_KERNEL_GS_BASE
>>         movq %gs:0, %rsp
>>
>
> Ditto.
>
>
>
>>         # Saving the FPU callee-saved state for now.  Might be able to
>> have the
>>         # preempt handler deal with it.
>> -       pushq $0                        # space for mxcsr and fpucw
>> +       pushq $0                                # space for mxcsr, fpucw,
>> and padding0
>> +       movw $0x1, 0x6(%rsp)    # tf_padding0 = 1, partial context
>>
>
> Ditto.
>
>
>

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