do apicrget and apicrput still need the special case for the 31/30
registers? Isn't that all in apicipi?

I'm ok with this as an intermediate commit, but I think we have another
pass or so to do on it.

Nice job getting it all working. IOMMU is just a real jungle.

LGTM

ron

On Wed, Dec 9, 2015 at 9:41 AM Gan Shun <[email protected]> wrote:

> My newly rebased changes. There is no actual difference in the code since
> Davide's changes did not affect me.
>
> The following changes since commit
> 495a723da7db40d18c933c0d9b979058b0d8ffa4:
>
>   Use core_id_early() in kprof trace buffer print code (2015-12-08
> 16:32:42 -0500)
>
> are available in the git repository at:
>
>   [email protected]:GanShun/akaros.git
> c0c444f9646147a530672546d5cdbaf28e357e70
>
> for you to fetch changes up to c0c444f9646147a530672546d5cdbaf28e357e70:
>
>   Swapped IPI sending to a full 64-bit write and APIC writes to msr regs.
> (2015-12-08 14:33:02 -0800)
>
> ----------------------------------------------------------------
> GanShun (5):
>       Switched from APIC to X2APIC mode
>       Initialized IOMMU and modified IOAPIC to send remappable interrupts.
>       ExtINT mode for IOMMU is working and remaps IOAPIC IRQ 4 to vector 39
>       IOMMU Rerouting of Interrupt 4 is now working. Busybox is receiving
> intrs
>       Swapped IPI sending to a full 64-bit write and APIC writes to msr
> regs.
>
>  kern/arch/x86/Kbuild          |   1 +
>  kern/arch/x86/apic.c          |  34 +++++++++-------
>  kern/arch/x86/apic.h          | 105
> +++++++++++++++++++++++------------------------
>  kern/arch/x86/apic9.c         | 174
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------
>  kern/arch/x86/ioapic.c        |  34 +++++++++++++---
>  kern/arch/x86/ioapic.h        |   3 +-
>  kern/arch/x86/iommu.c         | 178
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  kern/arch/x86/iommu.h         | 105
> +++++++++++++++++++++++++++++++++++++++++++++++
>  kern/arch/x86/mp.c            |   4 +-
>  kern/arch/x86/pmap64.c        |   7 +++-
>  kern/arch/x86/ros/mmu64.h     |   7 ++--
>  kern/arch/x86/smp_boot.c      |   6 ++-
>  kern/arch/x86/time.c          |   4 +-
>  kern/arch/x86/trap.c          |  30 ++++++++++++++
>  kern/arch/x86/trapentry64.S   |   3 +-
>  kern/arch/x86/vmm/intel/vmx.c |   9 +++-
>  tests/vmm/vmrunkernel.c       |  43 +++++++++++++-------
>  17 files changed, 611 insertions(+), 136 deletions(-)
>  create mode 100644 kern/arch/x86/iommu.c
>  create mode 100644 kern/arch/x86/iommu.h
>
>
> https://github.com/GanShun/akaros/compare/495a723da7db40d18c933c0d9b979058b0d8ffa4...c0c444f9646147a530672546d5cdbaf28e357e70
>
>
> On Sat, Dec 5, 2015 at 11:02 AM Gan Shun <[email protected]> wrote:
>
>> No rush. I just realized yesterday that rebasing onto master made this
>> break silently. Will fix it next week
>>
>> On Sat, Dec 5, 2015, 11:00 Dan Cross <[email protected]> wrote:
>>
>>> FYI, ACPI will be done early next week (I think).
>>>
>>> On Fri, Dec 4, 2015 at 2:43 PM, <[email protected]> wrote:
>>>
>>>> Please note that currently, the IOMMU is hardcoded currently at a
>>>> specific physical address that requires the ACPI stuff to find out
>>>> dynamically.
>>>>
>>>> *THIS WILL NOT WORK OUT OF THE BOX FOR A DIFFERENT MACHINE
>>>> CONFIGURATION OTHER THAN THE ONES WE BUILT IN MTV*
>>>>
>>>> If you're looking to try it out on another machine, you'll need to find
>>>> out the IOMMU's register bases in the VHRD, and find out which IOMMU maps
>>>> to the IOAPIC you want. Then you can change the DMAR_REG_PADDR value in
>>>> kern/arch/x86/iommu.h to whatever the VHRD tells you.
>>>>
>>>> The following changes since commit
>>>> 0b10f30b9b9b18f0e45390231dbdaf7b045fbd5b:
>>>>
>>>>   Print ${remote}:${head} in link for code review (2015-12-03 12:38:20
>>>> -0500)
>>>>
>>>> are available in the git repository at:
>>>>
>>>>   [email protected]:GanShun/akaros.git
>>>>
>>>> for you to fetch changes up to dbdd541935111c8d418c77f83ddb885528768b89:
>>>>
>>>>   Swapped IPI sending to a full 64-bit write and APIC writes to msr
>>>> regs. (2015-12-04 11:18:48 -0800)
>>>>
>>>> ----------------------------------------------------------------
>>>> GanShun (5):
>>>>       Switched from APIC to X2APIC mode
>>>>       Initialized IOMMU and modified IOAPIC to send remappable
>>>> interrupts.
>>>>       ExtINT mode for IOMMU is working and remaps IOAPIC IRQ 4 to
>>>> vector 39
>>>>       IOMMU Rerouting of Interrupt 4 is now working. Busybox is
>>>> receiving intrs
>>>>       Swapped IPI sending to a full 64-bit write and APIC writes to msr
>>>> regs.
>>>>
>>>>  kern/arch/x86/Kbuild          |   1 +
>>>>  kern/arch/x86/apic.c          |  34 ++++++++-------
>>>>  kern/arch/x86/apic.h          | 105
>>>> ++++++++++++++++++++++++-----------------------
>>>>  kern/arch/x86/apic9.c         | 174
>>>> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------
>>>>  kern/arch/x86/ioapic.c        |  34 ++++++++++++---
>>>>  kern/arch/x86/ioapic.h        |   3 +-
>>>>  kern/arch/x86/iommu.c         | 178
>>>> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>>>>  kern/arch/x86/iommu.h         | 105
>>>> +++++++++++++++++++++++++++++++++++++++++++++++
>>>>  kern/arch/x86/mp.c            |   4 +-
>>>>  kern/arch/x86/pmap64.c        |   7 +++-
>>>>  kern/arch/x86/ros/mmu64.h     |   7 ++--
>>>>  kern/arch/x86/smp_boot.c      |   6 ++-
>>>>  kern/arch/x86/time.c          |   4 +-
>>>>  kern/arch/x86/trap.c          |  30 ++++++++++++++
>>>>  kern/arch/x86/trapentry64.S   |   3 +-
>>>>  kern/arch/x86/vmm/intel/vmx.c |   9 +++-
>>>>  tests/vmm/vmrunkernel.c       |  43 ++++++++++++-------
>>>>  17 files changed, 611 insertions(+), 136 deletions(-)
>>>>  create mode 100644 kern/arch/x86/iommu.c
>>>>  create mode 100644 kern/arch/x86/iommu.h
>>>>
>>>>
>>>> https://github.com/GanShun/akaros/compare/0b10f30b9b9b18f0e45390231dbdaf7b045fbd5b...dbdd541935111c8d418c77f83ddb885528768b89
>>>>
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>>>
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