It came down to me not initializing the mxcsr correctly at boot. The 
default power-on value masks every SIMD floating-point exception. I am 
preparing a patch that correctly initializes the MXCSR in the 
x86_default_fpu struct so that the register gets set correctly during 
per-cpu init.

On Saturday, February 27, 2016 at 8:33:28 AM UTC-8, rminnich wrote:
>
> well I knew barret and mike would fix it, and being a lame duck hacker, 
> well ...
>
> ron
>
> On Sat, Feb 27, 2016 at 7:10 AM Dan Cross <[email protected] <javascript:>> 
> wrote:
>
>> Thanks, Obama! Er, I mean Ron....
>>
>> On Sat, Feb 27, 2016 at 12:40 AM, ron minnich <[email protected] 
>> <javascript:>> wrote:
>>
>>> And that's my fault ... I told michael it would be nice to get the 
>>> kernel bits in and leave user space for next. 
>>>
>>> oopsie!
>>>
>>> ron
>>>
>>> On Fri, Feb 26, 2016 at 9:37 PM barret rhoden <[email protected] 
>>> <javascript:>> wrote:
>>>
>>>> On 2016-02-26 at 17:21 Barret Rhoden wrote:
>>>> > lock_test is trapping with a SIMD floating point error (trap 19)
>>>> > around here:
>>>> >
>>>> > 40589d:   f2 0f 51 c0             sqrtsd %xmm0,%xmm0
>>>> >
>>>> > Maybe whatever exception that is thrown used to be masked, but isn't
>>>> > anymore?  Does the new XSAVE stuff treat MXCSR differently?
>>>>
>>>> Oh.  It's likely that the problem is that userspace is still using the
>>>> old fp save and restore.
>>>>
>>>> Barret
>>>>
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