Updated patch: The following changes since commit a15fdf8612df97f0e9a3bbc9a806fb8643b05092:
Clean up IPv6 sources. (2016-03-09 11:39:59 -0500) are available in the git repository at: [email protected]:mtaufen/akaros.git xsave-amd for you to fetch changes up to 206991b416220db839238264db8f44d26cdfedc0: Added comment to note that fninit clears FOP (2016-03-09 15:45:30 -0800) ---------------------------------------------------------------- Michael Taufen (4): Added vmrunkernel option for extending the kernel command line passed to the guest Extended state AMD backwards compatibility updates (XCC) FP save/restore security patch for AMD processors Added comment to note that fninit clears FOP kern/arch/x86/cpuinfo.c | 30 +++++++---- kern/arch/x86/init.c | 189 ++++++++++++++++++++++++++++++++++++++++------------------------ kern/arch/x86/ros/cpu_feat.h | 8 ++- kern/arch/x86/smp_boot.c | 22 +++++--- kern/arch/x86/trap.h | 110 +++++++++++++++++++++++++++++++------ tests/vmm/vmrunkernel.c | 41 +++++++------- 6 files changed, 278 insertions(+), 122 deletions(-) On Monday, March 7, 2016 at 8:51:36 AM UTC-8, barret rhoden wrote: > > On 2016-03-06 at 16:45 Michael Taufen wrote: > > The following changes since commit > > 597386a35115980f5a223efabcc65268562866b1: > > > > x86: Use FSGSBASE for TLS changes (XCC) (2016-02-29 18:34:45 -0500) > > > > are available in the git repository at: > > > > [email protected]:mtaufen/akaros.git xsave-amd > > Looks great overall. And it works. =) > > Two minor things: > > - Can you rename the CPU_FEAT_VENDOR_* to CPU_FEAT_X86_VENDOR_*? > Either that, or we move those #defines from the x86 header to the > arch-indep header. I'm fine with either way - not sure if > OS-independent code will need to care about the vendor or not. > > - Your editor appears to be using spaces to indent in some places. > Please take a look at each patch (I noticed it on "Extended state" > and "FP save/restore") and search for spaces. In vim with search > highlighting, it will really stand out. For instance: > > + /* > + * Enable SSE instructions. > + * CR4.OSFXSR enables SSE and ensures that MXCSR/XMM gets saved with > FXSAVE > + * CR4.OSXSAVE enables XSAVE instructions. Only set if XSAVEOPT > supported. > + * CR4.OSXMME indicates OS support for software exception handlers > for > + * SIMD floating-point exceptions (turn it on to get #XM exceptions > + * in the event of a SIMD error instead of #UD exceptions). > + */ > + lcr4(rcr4() | CR4_OSFXSR | CR4_OSXMME); > + > + if (cpu_has_feat(CPU_FEAT_X86_XSAVEOPT)) { > + // You MUST set CR4.OSXSAVE before loading xcr0 > + lcr4(rcr4() | CR4_OSXSAVE); > + // Set xcr0 to the Akaros-wide default > + lxcr0(x86_default_xcr0); > + } > > The lcr4 line starts with a tab, but the other's do not (in the patch, > not in this email). For whatever reason, checkpatch misses this stuff. > > Barret > > -- You received this message because you are subscribed to the Google Groups "Akaros" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. For more options, visit https://groups.google.com/d/optout.
