Hi - On 2016-08-03 at 11:39 Gan Shun <[email protected]> wrote: > We report 0 for perf capabilities because we don't want to support perf > tools yet, and we report 0 for MCG to prevent linux from trying to setup > machine checks. > > Signed-off-by: Gan Shun <[email protected]> > Change-Id: Ieef80e16536a8448a570b69342e4a58ef82b15f0 > --- > kern/arch/x86/vmm/vmm.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/kern/arch/x86/vmm/vmm.c b/kern/arch/x86/vmm/vmm.c > index 072f320..c0172d6 100644 > --- a/kern/arch/x86/vmm/vmm.c > +++ b/kern/arch/x86/vmm/vmm.c > @@ -268,14 +268,16 @@ struct emmsr emmsrs[] = { > {MSR_PEBS_LD_LAT_THRESHOLD, "MSR_PEBS_LD_LAT_THRESHOLD", emsr_ok}, > // aaaaaahhhhhhhhhhhhhhhhhhhhh > {MSR_ARCH_PERFMON_EVENTSEL0, "MSR_ARCH_PERFMON_EVENTSEL0", emsr_ok}, > - {MSR_ARCH_PERFMON_EVENTSEL1, "MSR_ARCH_PERFMON_EVENTSEL0", emsr_ok}, > - {MSR_IA32_PERF_CAPABILITIES, "MSR_IA32_PERF_CAPABILITIES", emsr_ok}, > + {MSR_ARCH_PERFMON_EVENTSEL1, "MSR_ARCH_PERFMON_EVENTSEL1", emsr_ok}, > + {MSR_IA32_PERF_CAPABILITIES, "MSR_IA32_PERF_CAPABILITIES", > emsr_readzero},
I think we'll need to do more to block perf tools properly. Linux should be checking CPUID.01H:ECX.PDMC[bit 15] before using IA32_PERF_CAPABILITIES. So we can zero out that bit from cpuid, then probably not even let them access the MSR here. Barret -- You received this message because you are subscribed to the Google Groups "Akaros" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. For more options, visit https://groups.google.com/d/optout.
