Merged to master at ac67a8b3dfc0..df49aa39c458 (from, to] You can see the entire diff with 'git diff' or at https://github.com/brho/akaros/compare/ac67a8b3dfc0...df49aa39c458
On 2016-10-26 at 11:08 Gan Shun <[email protected]> wrote: > We weren't correctly checking the written value. We tell the guest that > PEBS is disabled, thus when they write the same value back to the MSR, we > should check for the disable bit in miscenable > > Signed-off-by: Gan Shun <[email protected]> > Change-Id: I0e00119d7fec678e2c4e3b2185565444022ac140 > --- > kern/arch/x86/vmm/vmm.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/kern/arch/x86/vmm/vmm.c b/kern/arch/x86/vmm/vmm.c > index c0172d6..f8a8294 100644 > --- a/kern/arch/x86/vmm/vmm.c > +++ b/kern/arch/x86/vmm/vmm.c > @@ -303,6 +303,7 @@ bool emsr_miscenable(struct emmsr *msr, uint64_t *rcx, > uint64_t *rdx, > return TRUE; > } else { > /* if they are writing what is already written, that's ok. */ > + eax |= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL; > if (((uint32_t) *rax == eax) && ((uint32_t) *rdx == edx)) > return TRUE; > } -- You received this message because you are subscribed to the Google Groups "Akaros" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. For more options, visit https://groups.google.com/d/optout.
