Update of /cvsroot/alsa/alsa-kernel/pci/ice1712
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv27243

Modified Files:
        ice1724.c 
Log Message:
avoid to change the AC97 rate registers.  this seems conflicting
with the rate conversion on VT172x.



Index: ice1724.c
===================================================================
RCS file: /cvsroot/alsa/alsa-kernel/pci/ice1712/ice1724.c,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -r1.32 -r1.33
--- ice1724.c   24 May 2004 13:18:20 -0000      1.32
+++ ice1724.c   25 May 2004 09:56:22 -0000      1.33
@@ -448,15 +448,6 @@
                if (ice->akm[i].ops.set_rate_val)
                        ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
        }
-
-       /* set up AC97 registers if needed */
-       if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) && ice->ac97) {
-               snd_ac97_set_rate(ice->ac97, AC97_PCM_FRONT_DAC_RATE, rate);
-               snd_ac97_set_rate(ice->ac97, AC97_PCM_SURR_DAC_RATE, rate);
-               snd_ac97_set_rate(ice->ac97, AC97_PCM_LFE_DAC_RATE, rate);
-               snd_ac97_set_rate(ice->ac97, AC97_SPDIF, rate);
-               snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, rate);
-       }
 }
 
 static int snd_vt1724_pcm_hw_params(snd_pcm_substream_t * substream,
@@ -716,15 +707,9 @@
                        ratec = AC97_RATES_FRONT_DAC;
                else
                        ratec = AC97_RATES_ADC;
-               runtime->hw.rates = ice->ac97->rates[ratec];
                runtime->hw.rate_max = 48000;
-               if (runtime->hw.rates == SNDRV_PCM_RATE_48000) {
-                       runtime->hw.rate_min = 48000;
-                       return 0;
-               } else {
-                       runtime->hw.rates = SNDRV_PCM_RATE_KNOT | 
SNDRV_PCM_RATE_8000_48000;
-                       return snd_pcm_hw_constraint_list(runtime, 0, 
SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_48);
-               }
+               runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
+               return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 
&hw_constraints_rates_48);
        }
        return 0;
 }



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