hi,
Even thought the SA11xx ARM platform DMA engine has a queueing
mechanism (as you mentioned), it is not being utilized. Since we are
queueing(or starting) the next dma transfer in the interrupt context, and we
recieve this interrupt only when the previous dma transfer ends. Queueing
makes sense only when a dma transfer is active and we queue another dma
transfer (to avoid a delay between starting another transfer).
So for now I think we might have to use the mechanisms suggested by Takashi
to queue extra periods to the dma engine.
regards
-kshitij
-----Original Message-----
From: Jaroslav Kysela [mailto:[EMAIL PROTECTED]
Sent: Thursday, March 11, 2004 11:30 PM
To: Takashi Iwai
Cc: Gupta, Kshitij; [EMAIL PROTECTED]
Subject: Re: FW: [Alsa-devel] DMA producer/consumer
On Thu, 11 Mar 2004, Takashi Iwai wrote:
> At Thu, 11 Mar 2004 18:43:39 +0100 (CET),
> Jaroslav wrote:
> >
> > On Thu, 11 Mar 2004, Takashi Iwai wrote:
> >
> > > unfortunately, the current implementation of ALSA PCM middle layer
> > > isn't well suited for this kind of hardwares. it'll be a bit more
> > > complicated than you think.
> >
> > I don't think that's this case. I'm not sure, if the basic midlevel
> > mechanism is understood: The midle level code expects that driver
> > start/stop the stream in the trigger callback, so if you can queue
> > more 'periods' into the DMA engine, do it and abort/pause the transfer
> > only the trigger callback request. You don't need to check appl/hw_ptr
> > in the lowlevel code.
>
> hmm, if i understand correctly, this DMA engine needs the update of
> DMA queue. i.e. the driver needs to feed chunks manually in prior
> to the DMA start, and continues feeding the available chunks after
> that as long as the stream is running. this is somewhat analogous
> with the case with the external hardware buffer.
It was case for sb8 driver, I think that all newer hardware which can do
DMA transfers is designed to enqueue more blocks to avoid fifo underruns
at the block boundary. At least the SA11xx ARM platform has the DMA engine
for two blocks (one can be prepared during transfer of the opposite).
Jaroslav
-----
Jaroslav Kysela <[EMAIL PROTECTED]>
Linux Kernel Sound Maintainer
ALSA Project, SuSE Labs
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