Arek Korbik wrote:
> To summarise: hardware generates an interrupt when it should not - the
> driver should handle it (the simplest solution: ignore). The attached
> patch:
> - adds interrupt-on-FIFOE handling(/ignoring) to handler routine
IMNSHO it's better to check for the buffer completion interrupt status
bit because that is the actual event we want to handle.
The patch below has been applied to CVS.
Regards,
Clemens
--
Index: intel8x0.c
===================================================================
RCS file: /cvsroot/alsa/alsa-kernel/pci/intel8x0.c,v
retrieving revision 1.136
diff -u -r1.136 intel8x0.c
--- intel8x0.c 21 Apr 2004 18:18:27 -0000 1.136
+++ intel8x0.c 26 Apr 2004 07:41:50 -0000
@@ -775,11 +775,14 @@
static inline void snd_intel8x0_update(intel8x0_t *chip, ichdev_t *ichdev)
{
unsigned long port = ichdev->reg_offset;
- int civ, i, step;
+ int status, civ, i, step;
int ack = 0;
+ status = igetbyte(chip, port + ichdev->roff_sr);
civ = igetbyte(chip, port + ICH_REG_OFF_CIV);
- if (civ == ichdev->civ) {
+ if (!(status & ICH_BCIS)) {
+ step = 0;
+ } else if (civ == ichdev->civ) {
// snd_printd("civ same %d\n", civ);
step = 1;
ichdev->civ++;
@@ -813,7 +816,8 @@
snd_pcm_period_elapsed(ichdev->substream);
spin_lock(&chip->reg_lock);
}
- iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
+ iputbyte(chip, port + ichdev->roff_sr,
+ status & (ICH_FIFOE | ICH_BCIS | ICH_LVBCI));
}
static irqreturn_t snd_intel8x0_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-------------------------------------------------------
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