On Tue, 2025-07-29 at 14:06 -0400, Harry Wentland wrote: > > > On 2025-07-23 11:57, Timur Kristóf wrote: > > We are going to support analog encoders as well, not just digital, > > so we need to make space for them in various arrays. > > > > Signed-off-by: Timur Kristóf <timur.kris...@gmail.com> > > --- > > .../drm/amd/display/dc/core/dc_link_enc_cfg.c | 4 ++-- > > .../gpu/drm/amd/display/dc/inc/core_types.h | 8 +++---- > > .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 24 > > +++++++++++++++++++ > > 3 files changed, 30 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c > > b/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c > > index 814f68d76257..d86482611b3f 100644 > > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c > > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c > > @@ -522,10 +522,10 @@ struct link_encoder > > *link_enc_cfg_get_link_enc_used_by_link( > > struct link_encoder *link_enc_cfg_get_next_avail_link_enc(struct > > dc *dc) > > { > > struct link_encoder *link_enc = NULL; > > - enum engine_id encs_assigned[MAX_DIG_LINK_ENCODERS]; > > + enum engine_id encs_assigned[MAX_LINK_ENCODERS]; > > int i; > > > > - for (i = 0; i < MAX_DIG_LINK_ENCODERS; i++) > > + for (i = 0; i < MAX_LINK_ENCODERS; i++) > > encs_assigned[i] = ENGINE_ID_UNKNOWN; > > > > /* Add assigned encoders to list. */ > > diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h > > b/drivers/gpu/drm/amd/display/dc/inc/core_types.h > > index f0d7185153b2..55daf348293e 100644 > > --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h > > +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h > > @@ -274,7 +274,7 @@ struct resource_pool { > > /* An array for accessing the link encoder objects that > > have been created. > > * Index in array corresponds to engine ID - viz. 0: > > ENGINE_ID_DIGA > > */ > > - struct link_encoder *link_encoders[MAX_DIG_LINK_ENCODERS]; > > + struct link_encoder *link_encoders[MAX_LINK_ENCODERS]; > > /* Number of DIG link encoder objects created - i.e. > > number of valid > > * entries in link_encoders array. > > */ > > @@ -508,7 +508,7 @@ struct pipe_ctx { > > struct link_enc_cfg_context { > > enum link_enc_cfg_mode mode; > > struct link_enc_assignment > > link_enc_assignments[MAX_PIPES]; > > - enum engine_id link_enc_avail[MAX_DIG_LINK_ENCODERS]; > > + enum engine_id link_enc_avail[MAX_LINK_ENCODERS]; > > struct link_enc_assignment > > transient_assignments[MAX_PIPES]; > > }; > > > > @@ -520,8 +520,8 @@ struct resource_context { > > uint8_t dp_clock_source_ref_count; > > bool is_dsc_acquired[MAX_PIPES]; > > struct link_enc_cfg_context link_enc_cfg_ctx; > > - unsigned int > > dio_link_enc_to_link_idx[MAX_DIG_LINK_ENCODERS]; > > - int dio_link_enc_ref_cnts[MAX_DIG_LINK_ENCODERS]; > > + unsigned int dio_link_enc_to_link_idx[MAX_LINK_ENCODERS]; > > + int dio_link_enc_ref_cnts[MAX_LINK_ENCODERS]; > > bool is_hpo_dp_stream_enc_acquired[MAX_HPO_DP2_ENCODERS]; > > unsigned int > > hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS]; > > int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS]; > > diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h > > b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h > > index 41c76ba9ba56..dc9b9f22c75b 100644 > > --- a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h > > +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h > > @@ -45,7 +45,31 @@ > > #define MAX_PIPES 6 > > #define MAX_PHANTOM_PIPES (MAX_PIPES / 2) > > #define MAX_LINKS (MAX_PIPES * 2 +2) > > + > > +/** > > + * define MAX_DIG_LINK_ENCODERS - maximum number of digital > > encoders > > + * > > + * Digital encoders are ENGINE_ID_DIGA...G, there are at most 7, > > + * although not every GPU may have that many. > > + */ > > #define MAX_DIG_LINK_ENCODERS 7 > > + > > +/** > > + * define MAX_DIG_LINK_ENCODERS - maximum number of analog link > > encoders > > _DAC_, not _DIG_ > > Harry
That's a typo, will fix. Timur. > > > + * > > + * Analog encoders are ENGINE_ID_DACA/B, there are at most 2, > > + * although not every GPU may have that many. Modern GPUs > > typically > > + * don't have analog encoders. > > + */ > > +#define MAX_DAC_LINK_ENCODERS 2 > > + > > +/** > > + * define MAX_LINK_ENCODERS - maximum number link encoders in > > total > > + * > > + * This includes both analog and digital encoders. > > + */ > > +#define MAX_LINK_ENCODERS (MAX_DIG_LINK_ENCODERS + > > MAX_DAC_LINK_ENCODERS) > > + > > #define MAX_DWB_PIPES 1 > > #define MAX_HPO_DP2_ENCODERS 4 > > #define MAX_HPO_DP2_LINK_ENCODERS 4