On Tue, 2025-08-19 at 16:14 -0400, Alex Deucher wrote: > On Tue, Aug 19, 2025 at 3:28 PM Timur Kristóf > <timur.kris...@gmail.com> wrote: > > > > Hi, > > > > On Sat, 2025-08-16 at 09:31 -0600, Rodrigo Siqueira wrote: > > > When using UMR, a dashboard is available that displays the CPC, > > > CPF, > > > CPG, TCP, and UTCL utilization. This commit introduces the > > > meanings > > > of > > > those acronyms (and others) to the glossary to improve the > > > comprehension > > > of the UMR dashboard. > > > > > > Cc: Alex Deucher <alexander.deuc...@amd.com> > > > Cc: Christian König <christian.koe...@amd.com> > > > Cc: Timur Kristóf <timur.kris...@gmail.com> > > > Signed-off-by: Rodrigo Siqueira <sique...@igalia.com> > > > --- > > > Documentation/gpu/amdgpu/amdgpu-glossary.rst | 21 > > > ++++++++++++++++++++ > > > 1 file changed, 21 insertions(+) > > > > > > diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > > b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > > index 30812d9d53c6..eb72e6f6d4f1 100644 > > > --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > > +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > > @@ -30,6 +30,15 @@ we have a dedicated glossary for Display Core > > > at > > > CP > > > Command Processor > > > > > > + CPC > > > + Command Processor Compute > > > + > > > + CPF > > > + Command Processor Fetch > > > + > > > + CPG > > > + Command Processor Graphics > > > + > > > > I would apprectiate a few more details here to connect these to > > other > > glossary items. Here are a few questions: > > > > - Is CPC the same as MEC? > > - Is CPF the same as PFP? > > - Is CPG the same as ME? > > CPC, CPF, and CPG are hardware blocks, MEC/PFP/ME are > microcontrollers. CPG contains the PFP and ME (and CE on chips which > support it). CPC contains MEC. CPF is another hardware block which > provides services to CPG and CPC.
Thanks for the clarification. Siquiera - could we add that also to the glossary? Thanks, Timur > > > > > > > CPLIB > > > Content Protection Library > > > > > > @@ -78,6 +87,9 @@ we have a dedicated glossary for Display Core > > > at > > > GMC > > > Graphic Memory Controller > > > > > > + GPR > > > + General Purpose Register > > > + > > > > Does this refer to registers in shaders or registers in the various > > IP > > blocks? If this is about shaders, it would be useful to mention > > that in > > the context of shaders, a GPR is either SGPR or VGPR. (Those two > > are > > already in the glossary.) > > > > > GPUVM > > > GPU Virtual Memory. This is the GPU's MMU. The GPU > > > supports > > > multiple > > > virtual address spaces that can be in flight at any given > > > time. These > > > @@ -92,6 +104,9 @@ we have a dedicated glossary for Display Core > > > at > > > table for use by the kernel driver or into per process > > > GPUVM > > > page tables > > > for application usage. > > > > > > + GWS > > > + Global Wave Syncs > > > + > > > IH > > > Interrupt Handler > > > > > > @@ -206,12 +221,18 @@ we have a dedicated glossary for Display > > > Core > > > at > > > TC > > > Texture Cache > > > > > > + TCP (AMDGPU) > > > + Texture Cache Processing > > > + > > > TOC > > > Table of Contents > > > > > > UMSCH > > > User Mode Scheduler > > > > > > + UTCL > > > + Universal Texture Cache Line > > > + > > > UVD > > > Unified Video Decoder > > >