The VCE rings only require single dword alignment.

Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index eab8d73..b78e740 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -299,7 +299,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
                        for (i = 0; i < AMDGPU_MAX_VCE_RINGS; i++)
                                ring_mask |= ((adev->vce.ring[i].ready ? 1 : 0) 
<< i);
                        ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
-                       ib_size_alignment = 8;
+                       ib_size_alignment = 1;
                        break;
                default:
                        return -EINVAL;
-- 
2.5.5

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to