Am 15.09.2016 um 20:08 schrieb Alex Deucher:
GFX IB frame is much bigger than other ring, so set the
limit larger.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Could we rather add some fields to the ring structure to indicate how
many base + per IB dw we need to allocate?
Probably better than having engine specific code here.
Christian.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 2aa741c..e11e4cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -152,7 +152,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned
num_ibs,
return -EINVAL;
}
- r = amdgpu_ring_alloc(ring, 256 * num_ibs);
+ /* GFX DMA frame is much bigger than other rings */
+ if (ring->type == AMDGPU_RING_TYPE_GFX)
+ r = amdgpu_ring_alloc(ring, 512 + num_ibs * 16);
+ else
+ r = amdgpu_ring_alloc(ring, 256 + num_ibs * 16);
if (r) {
dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
return r;
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