> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Friday, October 14, 2016 8:07 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.
> 
> Change-Id: Id71b9a3329a8a143a189b275926b0a2054bf0bb8

Series is:
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>

For CI, I wonder if it would be better to add support for it to the powerplay 
smu7 module since it's pretty similar to the other smu7 dGPUs.

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> index 1d8c375..fd2fe85 100644
> --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> @@ -960,6 +960,12 @@ static void ci_apply_state_adjust_rules(struct
> amdgpu_device *adev,
>               sclk = ps->performance_levels[0].sclk;
>       }
> 
> +     if (adev->pm.pm_display_cfg.min_core_set_clock > sclk)
> +             sclk = adev->pm.pm_display_cfg.min_core_set_clock;
> +
> +     if (adev->pm.pm_display_cfg.min_mem_set_clock > mclk)
> +             mclk = adev->pm.pm_display_cfg.min_mem_set_clock;
> +
>       if (rps->vce_active) {
>               if (sclk < adev->pm.dpm.vce_states[adev-
> >pm.dpm.vce_level].sclk)
>                       sclk = adev->pm.dpm.vce_states[adev-
> >pm.dpm.vce_level].sclk;
> --
> 1.9.1
> 
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