On Mon, Jan 23, 2017 at 10:55:49AM +0000, Zhu, Rex wrote: > we fixed this issue on Kv as uvd pg was enabled on APU. > > We need to change the uvd cg mode. > When idle, use hw cg. And encode, use sw cg. > > So > WREG32(mmUVD_CGC_GATE, 0); // ture off cg. > Then > uvd_v4_2_set_dcm(adev, true); // set sw cg. > The first patch can fix this issue. > > The second dpm patch can fix similar issue which caused by dpm's power state > setting.
Ah, thanks, that sounds good! I'll give these two patches a try on my system soon and report back in case I encounter any problems! :-) Greetings Nils _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
