On 03/29/2017 09:37 AM, Felix Kuehling wrote:
Sorry, I pushed it already, just with Alex's R-B.
That's fine.
Take it easy :)
Jerry
Thanks,
Felix
On 17-03-28 09:28 PM, Zhang, Jerry (Junwei) wrote:
On 03/29/2017 02:37 AM, Deucher, Alexander wrote:
-----Original Message-----
From: amd-gfx [mailto:[email protected]] On Behalf
Of Felix Kuehling
Sent: Tuesday, March 28, 2017 2:10 PM
To: Zhang, Jerry; [email protected]
Subject: Re: [PATCH] drm/amdgpu: Improve Vega10 VM fault handling
On 17-03-27 09:23 PM, Zhang, Jerry (Junwei) wrote:
On 03/28/2017 06:25 AM, Felix Kuehling wrote:
Register AMDGPU_IH_CLIENTID_UTCL2 as a source of VM faults. Clean
up the VM fault message format and use rate-limiting similar to
other ASICs.
Signed-off-by: Felix Kuehling <[email protected]>
May be better to split it into 2 patches
Reviewed-by: Junwei Zhang <[email protected]>
I had to rebase my patch and had to resolve a conflict with an SRIOV
change that just landed. So I split it into two commits while I was at
it. Please review the attached patches.
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Thanks.
Jerry
Thanks,
Felix
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 232c208..9831025 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -145,12 +145,17 @@ static int gmc_v9_0_process_interrupt(struct
amdgpu_device *adev,
WREG32_P(gfxhub->vm_l2_pro_fault_cntl, 1, ~1);
}
- DRM_ERROR("[%s]VMC page fault (src_id:%u ring:%u vm_id:%u
pas_id:%u) "
- "at page 0x%016llx from %d\n"
- "VM_L2_PROTECTION_FAULT_STATUS:0x%08X\n",
- entry->vm_id_src ? "mmhub" : "gfxhub",
- entry->src_id, entry->ring_id, entry->vm_id,
entry->pas_id,
- addr, entry->client_id, status);
+ if (printk_ratelimit()) {
+ dev_err(adev->dev,
+ "[%s] VMC page fault (src_id:%u ring:%u vm_id:%u
pas_id:%u)\n",
+ entry->vm_id_src ? "mmhub" : "gfxhub",
+ entry->src_id, entry->ring_id, entry->vm_id,
+ entry->pas_id);
+ dev_err(adev->dev, " at page 0x%016llx from %d\n",
+ addr, entry->client_id);
+ dev_err(adev->dev,
"VM_L2_PROTECTION_FAULT_STATUS:0x%08X\n",
+ status);
+ }
return 0;
}
@@ -539,6 +544,8 @@ static int gmc_v9_0_sw_init(void *handle)
/* This interrupt is VMC page fault.*/
r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_VMC, 0,
&adev->mc.vm_fault);
+ r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_UTCL2, 0,
+ &adev->mc.vm_fault);
if (r)
return r;
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