> -----Original Message----- > From: amd-gfx [mailto:[email protected]] On Behalf > Of Marek Olšák > Sent: Wednesday, May 17, 2017 2:06 PM > To: [email protected] > Subject: [PATCH] drm/amdgpu: add an INFO query for monitoring VRAM > CPU page faults > > From: Marek Olšák <[email protected]> > > Signed-off-by: Marek Olšák <[email protected]>
Please bump the driver version as well. With that fixed: Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 1 + > include/uapi/drm/amdgpu_drm.h | 2 ++ > 4 files changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index fadeb55..251e5de 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -1525,20 +1525,21 @@ struct amdgpu_device { > > /* memory management */ > struct amdgpu_mman mman; > struct amdgpu_vram_scratch vram_scratch; > struct amdgpu_wb wb; > atomic64_t vram_usage; > atomic64_t vram_vis_usage; > atomic64_t gtt_usage; > atomic64_t num_bytes_moved; > atomic64_t num_evictions; > + atomic64_t num_vram_cpu_page_faults; > atomic_t gpu_reset_counter; > > /* data for buffer migration throttling */ > struct { > spinlock_t lock; > s64 last_update_us; > s64 accum_us; /* accumulated > microseconds */ > u32 log2_max_MBps; > } mm_stats; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > index d167949..81291d8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > @@ -407,20 +407,23 @@ static int amdgpu_info_ioctl(struct drm_device > *dev, void *data, struct drm_file > > return copy_to_user(out, &fw_info, > min((size_t)size, sizeof(fw_info))) ? - > EFAULT : 0; > } > case AMDGPU_INFO_NUM_BYTES_MOVED: > ui64 = atomic64_read(&adev->num_bytes_moved); > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; > case AMDGPU_INFO_NUM_EVICTIONS: > ui64 = atomic64_read(&adev->num_evictions); > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; > + case AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS: > + ui64 = atomic64_read(&adev->num_vram_cpu_page_faults); > + return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; > case AMDGPU_INFO_VRAM_USAGE: > ui64 = atomic64_read(&adev->vram_usage); > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; > case AMDGPU_INFO_VIS_VRAM_USAGE: > ui64 = atomic64_read(&adev->vram_vis_usage); > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; > case AMDGPU_INFO_GTT_USAGE: > ui64 = atomic64_read(&adev->gtt_usage); > return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; > case AMDGPU_INFO_GDS_CONFIG: { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 6bc52cc..b6da86e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -953,20 +953,21 @@ int amdgpu_bo_fault_reserve_notify(struct > ttm_buffer_object *bo) > offset = bo->mem.start << PAGE_SHIFT; > /* TODO: figure out how to map scattered VRAM to the CPU */ > if ((offset + size) <= adev->mc.visible_vram_size) > return 0; > > /* Can't move a pinned BO to visible VRAM */ > if (abo->pin_count > 0) > return -EINVAL; > > /* hurrah the memory is not visible ! */ > + atomic64_inc(&adev->num_vram_cpu_page_faults); > amdgpu_ttm_placement_from_domain(abo, > AMDGPU_GEM_DOMAIN_VRAM); > lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT; > for (i = 0; i < abo->placement.num_placement; i++) { > /* Force into visible VRAM */ > if ((abo->placements[i].flags & TTM_PL_FLAG_VRAM) && > (!abo->placements[i].lpfn || > abo->placements[i].lpfn > lpfn)) > abo->placements[i].lpfn = lpfn; > } > r = ttm_bo_validate(bo, &abo->placement, false, false); > diff --git a/include/uapi/drm/amdgpu_drm.h > b/include/uapi/drm/amdgpu_drm.h > index c99fe63..4f34394 100644 > --- a/include/uapi/drm/amdgpu_drm.h > +++ b/include/uapi/drm/amdgpu_drm.h > @@ -598,20 +598,22 @@ struct drm_amdgpu_cs_chunk_data { > /* Subquery id: Query GPU temperature */ > #define AMDGPU_INFO_SENSOR_GPU_TEMP 0x3 > /* Subquery id: Query GPU load */ > #define AMDGPU_INFO_SENSOR_GPU_LOAD 0x4 > /* Subquery id: Query average GPU power */ > #define AMDGPU_INFO_SENSOR_GPU_AVG_POWER 0x5 > /* Subquery id: Query northbridge voltage */ > #define AMDGPU_INFO_SENSOR_VDDNB 0x6 > /* Subquery id: Query graphics voltage */ > #define AMDGPU_INFO_SENSOR_VDDGFX 0x7 > +/* Number of VRAM page faults on CPU access. */ > +#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E > > #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 > #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff > #define AMDGPU_INFO_MMR_SH_INDEX_SHIFT 8 > #define AMDGPU_INFO_MMR_SH_INDEX_MASK 0xff > > struct drm_amdgpu_query_fw { > /** AMDGPU_INFO_FW_* */ > __u32 fw_type; > /** > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
