Am 23.05.2017 um 21:03 schrieb Felix Kuehling:
On 17-05-23 12:52 PM, Christian König wrote:--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c @@ -395,7 +395,13 @@ static uint64_t gmc_v6_0_get_vm_pte_flags(struct amdgpu_device *adev, return pte_flag; } +static uint64_t gmc_v6_0_get_vm_pde(struct amdgpu_device *adev, uint64_t addr) +{ + BUG_ON(addr & 0xFFFFF0000000FFFULL); + return addr; +} +The mask in the BUG_ON leaves out the highest 4 bits (63-60). Is that intentional? Same for gmc_v7_0.c.diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index 3b5ea0f..f05c034 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c @@ -656,7 +656,13 @@ static uint64_t gmc_v8_0_get_vm_pte_flags(struct amdgpu_device *adev, return pte_flag; }+static uint64_t gmc_v8_0_get_vm_pde(struct amdgpu_device *adev,uint64_t addr) +{ + BUG_ON(addr & 0xFFF0000000000FFFULL); + return addr; +} +This looks like you're allowing 52bit physical addresses for GFX 8. AFAIK the HW only supports 40 bits. Is that intentional?
No, both issues are just typos caused by to much things to do in parallel. Thanks for pointing that out, Christian.
Other than that, the patch is Reviewed-by: Felix Kuehling <[email protected]> Regards, Felix _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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