Hi, Tom, You have found a bug.
Your patch looks fine for me. Have you confirmed the deleted part is older version? Perhaps search email list or git history to confirm? Alex Bin Xie -----Original Message----- From: amd-gfx [mailto:[email protected]] On Behalf Of [email protected] Sent: Monday, June 5, 2017 8:00 AM To: [email protected] Subject: amd-gfx Digest, Vol 13, Issue 29 Send amd-gfx mailing list submissions to [email protected] To subscribe or unsubscribe via the World Wide Web, visit https://lists.freedesktop.org/mailman/listinfo/amd-gfx or, via email, send a message with subject or body 'help' to [email protected] You can reach the person managing the list at [email protected] When replying, please edit your Subject line so it is more specific than "Re: Contents of amd-gfx digest..." Today's Topics: 1. [PATCH] drm/amd/amdgpu: Fix ring initialization for GFX9 (Tom St Denis) ---------------------------------------------------------------------- Message: 1 Date: Mon, 5 Jun 2017 07:46:01 -0400 From: Tom St Denis <[email protected]> To: [email protected] Cc: Tom St Denis <[email protected]> Subject: [PATCH] drm/amd/amdgpu: Fix ring initialization for GFX9 Message-ID: <[email protected]> Content-Type: text/plain The commit 83866f0fc72017d55f40cbd4160cd1e42a2cc3a8 erroneously included the old ring init sequence along with the new one which uses shared header definitions. The fix which works on my vega10 seems to be to drop the old init sequence. Signed-off-by: Tom St Denis <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 26 -------------------------- 1 file changed, 26 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 9502353ec325..8388893e0b11 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -1586,32 +1586,6 @@ static int gfx_v9_0_sw_init(void *handle) ring_id++; } - /* set up the compute queues */ - for (i = 0, ring_id = 0; i < AMDGPU_MAX_COMPUTE_QUEUES; i++) { - unsigned irq_type; - - /* max 32 queues per MEC */ - if ((i >= 32) || (i >= AMDGPU_MAX_COMPUTE_RINGS)) { - DRM_ERROR("Too many (%d) compute rings!\n", i); - break; - } - ring = &adev->gfx.compute_ring[i]; - ring->ring_obj = NULL; - ring->use_doorbell = true; - ring->doorbell_index = (AMDGPU_DOORBELL64_MEC_RING0 + i) << 1; - ring->me = 1; /* first MEC */ - ring->pipe = i / 8; - ring->queue = i % 8; - ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + (i * GFX9_MEC_HPD_SIZE); - sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue); - irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe; - /* type-2 packets are deprecated on MEC, use type-3 instead */ - r = amdgpu_ring_init(adev, ring, 1024, - &adev->gfx.eop_irq, irq_type); - if (r) - return r; - } - r = gfx_v9_0_kiq_init(adev); if (r) { DRM_ERROR("Failed to init KIQ BOs!\n"); -- 2.12.0 ------------------------------ Subject: Digest Footer _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx ------------------------------ End of amd-gfx Digest, Vol 13, Issue 29 *************************************** _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
