RE: [PATCH v2] drm/amd/display: Add NULL test for 'timing generator' in 'dcn21_set_pipe()'

[Koo, Anthony]

[AMD Official Use Only - General]

Reviewed-by: Anthony Koo <anthony....@amd.com>

Thanks,
Anthony

-----Original Message-----
From: SHANMUGAM, SRINIVASAN <srinivasan.shanmu...@amd.com>
Sent: Thursday, February 1, 2024 4:59 AM
To: Siqueira, Rodrigo <rodrigo.sique...@amd.com>; Pillai, Aurabindo 
<aurabindo.pil...@amd.com>; Koo, Anthony <anthony....@amd.com>
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN 
<srinivasan.shanmu...@amd.com>; Sun, Yongqiang <yongqiang....@amd.com>
Subject: [PATCH v2] drm/amd/display: Add NULL test for 'timing generator' in 
'dcn21_set_pipe()'

In "u32 otg_inst = pipe_ctx->stream_res.tg->inst;"
pipe_ctx->stream_res.tg could be NULL, it is relying on the caller to ensure 
the tg is not NULL.

Fixes: 474ac4a875ca ("drm/amd/display: Implement some asic specific abm call 
backs.")
Cc: Yongqiang Sun <yongqiang....@amd.com>
Cc: Anthony Koo <anthony....@amd.com>
Cc: Rodrigo Siqueira <rodrigo.sique...@amd.com>
Cc: Aurabindo Pillai <aurabindo.pil...@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmu...@amd.com>
---
v2:
  - s/u32/uint32_t for consistency (Anthony)

 .../amd/display/dc/hwss/dcn21/dcn21_hwseq.c   | 24 +++++++++++--------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
index 8e88dcaf88f5..8323077bba15 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
@@ -206,28 +206,32 @@ void dcn21_set_abm_immediate_disable(struct pipe_ctx 
*pipe_ctx)  void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)  {
        struct abm *abm = pipe_ctx->stream_res.abm;
-       uint32_t otg_inst = pipe_ctx->stream_res.tg->inst;
+       struct timing_generator *tg = pipe_ctx->stream_res.tg;
        struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
        struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;
+       uint32_t otg_inst;
+
+       if (!abm && !tg && !panel_cntl)
+               return;
+
+       otg_inst = tg->inst;

        if (dmcu) {
                dce110_set_pipe(pipe_ctx);
                return;
        }

-       if (abm && panel_cntl) {
-               if (abm->funcs && abm->funcs->set_pipe_ex) {
-                       abm->funcs->set_pipe_ex(abm,
+       if (abm->funcs && abm->funcs->set_pipe_ex) {
+               abm->funcs->set_pipe_ex(abm,
                                        otg_inst,
                                        SET_ABM_PIPE_NORMAL,
                                        panel_cntl->inst,
                                        panel_cntl->pwrseq_inst);
-               } else {
-                               dmub_abm_set_pipe(abm, otg_inst,
-                                               SET_ABM_PIPE_NORMAL,
-                                               panel_cntl->inst,
-                                               panel_cntl->pwrseq_inst);
-               }
+       } else {
+               dmub_abm_set_pipe(abm, otg_inst,
+                                 SET_ABM_PIPE_NORMAL,
+                                 panel_cntl->inst,
+                                 panel_cntl->pwrseq_inst);
        }
 }

--
2.34.1