[PATCH 1/3] drm/amd/pm: Fix negative array index read warning for pptable->DpmDescriptor

[Jesse Zhang]

Avoid using the negative values 
for clk_idex as an index into an array pptable->DpmDescriptor.

Signed-off-by: Jesse Zhang <jesse.zh...@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 25 +++++++++++++++----
 1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 5a68d365967f..cd88d2c3841a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1219,15 +1219,18 @@ static int navi10_get_current_clk_freq_by_table(struct 
smu_context *smu,
                                           value);
 }
 
-static bool navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum 
smu_clk_type clk_type)
+static int navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum 
smu_clk_type clk_type)
 {
        PPTable_t *pptable = smu->smu_table.driver_pptable;
        DpmDescriptor_t *dpm_desc = NULL;
-       uint32_t clk_index = 0;
+       int clk_index = 0;
 
        clk_index = smu_cmn_to_asic_specific_index(smu,
                                                   CMN2ASIC_MAPPING_CLK,
                                                   clk_type);
+       if(clk_index)
+               return clk_index;
+
        dpm_desc = &pptable->DpmDescriptor[clk_index];
 
        /* 0 - Fine grained DPM, 1 - Discrete DPM */
@@ -1287,7 +1290,11 @@ static int navi10_emit_clk_levels(struct smu_context 
*smu,
                if (ret)
                        return ret;
 
-               if (!navi10_is_support_fine_grained_dpm(smu, clk_type)) {
+               ret = navi10_is_support_fine_grained_dpm(smu, clk_type);
+               if (ret < 0)
+                       return ret;
+
+               if (!ret) {
                        for (i = 0; i < count; i++) {
                                ret = smu_v11_0_get_dpm_freq_by_index(smu,
                                                                      clk_type, 
i, &value);
@@ -1496,7 +1503,11 @@ static int navi10_print_clk_levels(struct smu_context 
*smu,
                if (ret)
                        return size;
 
-               if (!navi10_is_support_fine_grained_dpm(smu, clk_type)) {
+               ret = navi10_is_support_fine_grained_dpm(smu, clk_type);
+               if (ret < 0)
+                       return ret;
+
+               if (!ret) {
                        for (i = 0; i < count; i++) {
                                ret = smu_v11_0_get_dpm_freq_by_index(smu, 
clk_type, i, &value);
                                if (ret)
@@ -1665,7 +1676,11 @@ static int navi10_force_clk_levels(struct smu_context 
*smu,
        case SMU_UCLK:
        case SMU_FCLK:
                /* There is only 2 levels for fine grained DPM */
-               if (navi10_is_support_fine_grained_dpm(smu, clk_type)) {
+               ret = navi10_is_support_fine_grained_dpm(smu, clk_type);
+               if (ret < 0)
+                       return ret;
+
+               if (ret) {
                        soft_max_level = (soft_max_level >= 1 ? 1 : 0);
                        soft_min_level = (soft_min_level >= 1 ? 1 : 0);
                }
-- 
2.25.1