[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Alex Deucher <[email protected]> ________________________________ From: Jesse Zhang <[email protected]> Sent: Tuesday, May 21, 2024 3:16 AM To: [email protected] <[email protected]> Cc: Deucher, Alexander <[email protected]>; Koenig, Christian <[email protected]>; Huang, Tim <[email protected]>; Zhang, Jesse(Jie) <[email protected]>; Zhang, Jesse(Jie) <[email protected]> Subject: [PATCH 2/4 V2] drm/amd/pm: fix unsigned value asic_type compared against
Enum asic_type always greater than or equal CHIP_TAHITI. Signed-off-by: Jesse Zhang <[email protected]> Suggested-by: Tim Huang <[email protected]> --- drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c index f245fc0bc6d3..68ac01a8bc3a 100644 --- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c +++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c @@ -7928,12 +7928,8 @@ static void si_dpm_print_power_state(void *handle, DRM_INFO("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); for (i = 0; i < ps->performance_level_count; i++) { pl = &ps->performance_levels[i]; - if (adev->asic_type >= CHIP_TAHITI) - DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n", - i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); - else - DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u\n", - i, pl->sclk, pl->mclk, pl->vddc, pl->vddci); + DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n", + i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); } amdgpu_dpm_print_ps_status(adev, rps); } -- 2.25.1
