On 2/13/2025 1:10 AM, Amber Lin wrote:
> As far as the number of XCCs, the number of compute partitions, and the
> number of memory partitions qualify, CPX is valid.
> 
> Change-Id: I65696f25e2afd75f2f4a177dabc0991b15293d9a
> Signed-off-by: Amber Lin <[email protected]>

Reviewed-by: Lijo Lazar <[email protected]>

Thanks,
Lijo

> ---
>  drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c 
> b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
> index e157d6d857b6..2753f282e42d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
> +++ b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
> @@ -559,8 +559,11 @@ static bool __aqua_vanjaram_is_valid_mode(struct 
> amdgpu_xcp_mgr *xcp_mgr,
>                       adev->gmc.num_mem_partitions == 4) &&
>                      (num_xccs_per_xcp >= 2);
>       case AMDGPU_CPX_PARTITION_MODE:
> +             /* (num_xcc > 1) because 1 XCC is considered SPX, not CPX.
> +              * (num_xcc % adev->gmc.num_mem_partitions) == 0 because
> +              * num_compute_partitions can't be less than num_mem_partitions
> +              */
>               return ((num_xcc > 1) &&
> -                    (adev->gmc.num_mem_partitions == 1 || 
> adev->gmc.num_mem_partitions == 4) &&
>                      (num_xcc % adev->gmc.num_mem_partitions) == 0);
>       default:
>               return false;

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