[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Prike Liang <[email protected]>
Regards,
Prike
> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of Alex
> Deucher
> Sent: Thursday, March 20, 2025 3:09 AM
> To: [email protected]
> Cc: Deucher, Alexander <[email protected]>
> Subject: [PATCH 2/4] drm/amdgpu/mes: enable compute pipes across all MEC
>
> Enable pipes on both MECs for MES.
>
> Fixes: 745f46b6a99f ("drm/amdgpu: enable mes v12 self test")
> Signed-off-by: Alex Deucher <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index 10f14bf925778..ac9b1708e20d8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -130,8 +130,7 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
> }
>
> for (i = 0; i < AMDGPU_MES_MAX_COMPUTE_PIPES; i++) {
> - /* use only 1st MEC pipes */
> - if (i >= adev->gfx.mec.num_pipe_per_mec)
> + if (i >= (adev->gfx.mec.num_pipe_per_mec * adev-
> >gfx.mec.num_mec))
> break;
> adev->mes.compute_hqd_mask[i] = 0xc;
> }
> --
> 2.48.1