On Wed, Jul 16, 2025 at 12:33 AM Lazar, Lijo <lijo.la...@amd.com> wrote:
>
>
>
> On 7/12/2025 3:21 AM, Alex Deucher wrote:
> > Set the MQD as appropriate for the queue priv state.
> >
> > Acked-by: Christian König <christian.koe...@amd.com>
> > Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8 ++++++--
> > 1 file changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > index 37dcec2d07841..b9ba8b22a1073 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> > @@ -4124,6 +4124,8 @@ static int gfx_v11_0_gfx_mqd_init(struct
> > amdgpu_device *adev, void *m,
> > #endif
> > if (prop->tmz_queue)
> > tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);
> > + if (!prop->priv_queue)
> > + tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);
> > mqd->cp_gfx_hqd_cntl = tmp;
> >
> > /* set up cp_doorbell_control */
> > @@ -4276,8 +4278,10 @@ static int gfx_v11_0_compute_mqd_init(struct
> > amdgpu_device *adev, void *m,
> > tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
> > tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH,
> > prop->allow_tunneling);
> > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
> > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
> > + if (prop->priv_queue) {
> > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
> > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
> > + }
>
> As per above logic, only kernel mode queues are supposed to be
> privileged. If so, would suggest renaming the flag to kernel_q
I'll respin with the rename.
Alex
>
> Thanks,
> Lijo
>
> > if (prop->tmz_queue)
> > tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);
> > mqd->cp_hqd_pq_control = tmp;
>
