[Public]
Maybe this issue is introduced by the userq mapped to a privileged queue, could
you try whether the issue can be seen when only enable the userq?
Regards,
Prike
> -----Original Message-----
> From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Zhang,
> Jesse(Jie)
> Sent: Tuesday, July 22, 2025 10:38 AM
> To: Deucher, Alexander <alexander.deuc...@amd.com>; amd-
> g...@lists.freedesktop.org
> Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Koenig, Christian
> <christian.koe...@amd.com>
> Subject: RE: [PATCH 2/3] drm/amdgpu/gfx11: set MQD as appriopriate for queue
> types
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Hi Alex,
>
> With this mqd configuration we get many cases of illegal register flooding
> and reset
> not working.
> Should we create the privileged user queue ?
>
>
> Log:
> [drm:gfx_v11_0_priv_reg_irq [amdgpu]] *ERROR* Illegal register access in
> command stream [ 180.429970] [drm:gfx_v11_0_priv_reg_irq [amdgpu]] *ERROR*
> Illegal register access in command stream
>
>
> Thanks
> Jesse
> -----Original Message-----
> From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Alex
> Deucher
> Sent: Thursday, July 17, 2025 6:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Koenig, Christian
> <christian.koe...@amd.com>
> Subject: [PATCH 2/3] drm/amdgpu/gfx11: set MQD as appriopriate for queue types
>
> Set the MQD as appropriate for the kernel vs user queues.
>
> Acked-by: Christian König <christian.koe...@amd.com>
> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index 372dceceff359..9dd49b1caa605 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -4129,6 +4129,8 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device
> *adev, void *m, #endif
> if (prop->tmz_queue)
> tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);
> + if (!prop->kernel_queue)
> + tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV,
> + 1);
> mqd->cp_gfx_hqd_cntl = tmp;
>
> /* set up cp_doorbell_control */ @@ -4281,8 +4283,10 @@ static int
> gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
> tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL,
> UNORD_DISPATCH, 1);
> tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL,
> TUNNEL_DISPATCH,
> prop->allow_tunneling);
> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
> + if (prop->kernel_queue) {
> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE,
> 1);
> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE,
> 1);
> + }
> if (prop->tmz_queue)
> tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);
> mqd->cp_hqd_pq_control = tmp;
> --
> 2.50.1
