[AMD Official Use Only - AMD Internal Distribution Only]
The series is Reviewed-by: Stanley.Yang <stanley.y...@amd.com>
Regards,
Stanley
> -----Original Message-----
> From: Liu, Xiang(Dean) <xiang....@amd.com>
> Sent: Thursday, July 31, 2025 3:19 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking <hawking.zh...@amd.com>; Yang, Stanley
> <stanley.y...@amd.com>; Liu, Xiang(Dean) <xiang....@amd.com>
> Subject: [PATCH 2/2] drm/amdgpu: Fix vcn v4.0.3 poison irq call trace on sriov
> guest
>
> Sriov guest side doesn't init ras feature hence the poison irq shouldn't be
> put
> during hw fini.
>
> Fixes: d260e486d34d ("drm/amdgpu: Register aqua vanjaram vcn poison
> irq")
>
> [25209.468816] Call Trace:
> [25209.468817] <TASK>
> [25209.468818] ? srso_alias_return_thunk+0x5/0x7f [25209.468820] ?
> show_trace_log_lvl+0x28e/0x2ea [25209.468822] ?
> show_trace_log_lvl+0x28e/0x2ea [25209.468825] ?
> vcn_v4_0_3_hw_fini+0xaf/0xe0 [amdgpu] [25209.468936] ?
> show_regs.part.0+0x23/0x29 [25209.468939] ? show_regs.cold+0x8/0xd
> [25209.468940] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.469038] ?
> __warn+0x8c/0x100 [25209.469040] ? amdgpu_irq_put+0x9e/0xc0
> [amdgpu] [25209.469135] ? report_bug+0xa4/0xd0 [25209.469138] ?
> handle_bug+0x39/0x90 [25209.469140] ? exc_invalid_op+0x19/0x70
> [25209.469142] ? asm_exc_invalid_op+0x1b/0x20 [25209.469146] ?
> amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.469241]
> vcn_v4_0_3_hw_fini+0xaf/0xe0 [amdgpu] [25209.469343]
> amdgpu_ip_block_hw_fini+0x34/0x61 [amdgpu] [25209.469511]
> amdgpu_device_fini_hw+0x3b3/0x467 [amdgpu]
>
> Signed-off-by: Xiang Liu <xiang....@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index c51dc401226a..c6450ed65c12 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -384,7 +384,7 @@ static int vcn_v4_0_3_hw_fini(struct
> amdgpu_ip_block *ip_block)
> vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
> }
>
> - if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
> + if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN) &&
> +!amdgpu_sriov_vf(adev))
> amdgpu_irq_put(adev, &adev->vcn.inst->ras_poison_irq, 0);
>
> return 0;
> --
> 2.34.1
