Applied. Thanks! Alex
On Sat, Aug 16, 2025 at 10:49 AM Qianfeng Rong <[email protected]> wrote: > > Use max() to reduce the code and improve readability. > > No functional changes. > > Signed-off-by: Qianfeng Rong <[email protected]> > --- > .../gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 7 ++----- > .../gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 6 +----- > .../amd/display/dc/dml2/dml21/dml21_translation_helper.c | 6 +----- > 3 files changed, 4 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c > b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c > index 084994c650c4..8376e2b0e73d 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c > @@ -1047,11 +1047,8 @@ static void dcn32_get_memclk_states_from_smu(struct > clk_mgr *clk_mgr_base) > &num_entries_per_clk->num_fclk_levels); > clk_mgr_base->bw_params->dc_mode_limit.fclk_mhz = > dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_FCLK); > > - if (num_entries_per_clk->num_memclk_levels >= > num_entries_per_clk->num_fclk_levels) { > - num_levels = num_entries_per_clk->num_memclk_levels; > - } else { > - num_levels = num_entries_per_clk->num_fclk_levels; > - } > + num_levels = max(num_entries_per_clk->num_memclk_levels, > num_entries_per_clk->num_fclk_levels); > + > clk_mgr_base->bw_params->max_memclk_mhz = > > clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels > - 1].memclk_mhz; > clk_mgr_base->bw_params->clk_table.num_entries = num_levels ? > num_levels : 1; > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > index b59703467128..47ff4c965d76 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > @@ -1404,11 +1404,7 @@ static void dcn401_get_memclk_states_from_smu(struct > clk_mgr *clk_mgr_base) > > clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_fclk_levels > - 1].fclk_mhz) > clk_mgr_base->bw_params->dc_mode_limit.fclk_mhz = 0; > > - if (num_entries_per_clk->num_memclk_levels >= > num_entries_per_clk->num_fclk_levels) { > - num_levels = num_entries_per_clk->num_memclk_levels; > - } else { > - num_levels = num_entries_per_clk->num_fclk_levels; > - } > + num_levels = max(num_entries_per_clk->num_memclk_levels, > num_entries_per_clk->num_fclk_levels); > > clk_mgr_base->bw_params->clk_table.num_entries = num_levels ? > num_levels : 1; > > diff --git > a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c > b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c > index a06217a9eef6..21cc30f9b8a8 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c > +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c > @@ -463,11 +463,7 @@ static void > populate_dml21_timing_config_from_stream_state(struct dml2_timing_cf > (stream->timing.h_total * (long > long)calc_max_hardware_v_total(stream))); > } > > - if (stream->timing.min_refresh_in_uhz > min_hardware_refresh_in_uhz) { > - timing->drr_config.min_refresh_uhz = > stream->timing.min_refresh_in_uhz; > - } else { > - timing->drr_config.min_refresh_uhz = > min_hardware_refresh_in_uhz; > - } > + timing->drr_config.min_refresh_uhz = > max(stream->timing.min_refresh_in_uhz, min_hardware_refresh_in_uhz); > > if > (dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase && > stream->ctx->dc->config.enable_fpo_flicker_detection > == 1) > -- > 2.34.1 >
