According to pp_pm_compute_clocks the non-DC display code
has "issues with mclk switching with refresh rates over 120 hz".
The workaround is to disable MCLK switching in this case.

Do the same for legacy DPM.

Fixes: 6ddbd37f1074 ("drm/amd/pm: optimize the amdgpu_pm_compute_clocks() 
implementations")
Signed-off-by: Timur Kristóf <timur.kris...@gmail.com>
---
 drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c 
b/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c
index 42efe838fa85..2d2d2d5e6763 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c
@@ -66,6 +66,13 @@ u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
                                        (amdgpu_crtc->v_border * 2));
 
                                vblank_time_us = vblank_in_pixels * 1000 / 
amdgpu_crtc->hw_mode.clock;
+
+                               /* we have issues with mclk switching with
+                                * refresh rates over 120 hz on the non-DC code.
+                                */
+                               if (drm_mode_vrefresh(&amdgpu_crtc->hw_mode) > 
120)
+                                       vblank_time_us = 0;
+
                                break;
                        }
                }
-- 
2.51.0

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