[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Leo Liu <leo....@amd.com>
> -----Original Message-----
> From: Sundararaju, Sathishkumar <sathishkumar.sundarar...@amd.com>
> Sent: September 4, 2025 7:22 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Liu, Leo
> <leo....@amd.com>; Wu, David <david....@amd.com>; Sundararaju,
> Sathishkumar <sathishkumar.sundarar...@amd.com>
> Subject: [PATCH] drm/amdgpu/jpeg: Move parse_cs to amdgpu_jpeg.c
>
> Rename jpeg_v2_dec_ring_parse_cs to amdgpu_jpeg_dec_parse_cs and
> move it to amdgpu_jpeg.c as it is shared among jpeg versions.
>
> Signed-off-by: Sathishkumar S <sathishkumar.sundarar...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 65
> ++++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 10 ++++
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 58 +--------------------
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h | 6 ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 4 +-
> drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c | 2 +-
> 10 files changed, 83 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> index f0d7e2487237..e7b4b768f7d2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> @@ -539,3 +539,68 @@ void amdgpu_jpeg_print_ip_state(struct
> amdgpu_ip_block *ip_block, struct drm_pri
> drm_printf(p, "\nInactive Instance:JPEG%d\n", i);
> }
> }
> +
> +static inline bool amdgpu_jpeg_reg_valid(u32 reg) {
> + if (reg < JPEG_REG_RANGE_START || reg > JPEG_REG_RANGE_END ||
> + (reg >= JPEG_ATOMIC_RANGE_START && reg <=
> JPEG_ATOMIC_RANGE_END))
> + return false;
> + else
> + return true;
> +}
> +
> +/**
> + * amdgpu_jpeg_dec_parse_cs - command submission parser
> + *
> + * @parser: Command submission parser context
> + * @job: the job to parse
> + * @ib: the IB to parse
> + *
> + * Parse the command stream, return -EINVAL for invalid packet,
> + * 0 otherwise
> + */
> +
> +int amdgpu_jpeg_dec_parse_cs(struct amdgpu_cs_parser *parser,
> + struct amdgpu_job *job,
> + struct amdgpu_ib *ib)
> +{
> + u32 i, reg, res, cond, type;
> + struct amdgpu_device *adev = parser->adev;
> +
> + for (i = 0; i < ib->length_dw ; i += 2) {
> + reg = CP_PACKETJ_GET_REG(ib->ptr[i]);
> + res = CP_PACKETJ_GET_RES(ib->ptr[i]);
> + cond = CP_PACKETJ_GET_COND(ib->ptr[i]);
> + type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);
> +
> + if (res) /* only support 0 at the moment */
> + return -EINVAL;
> +
> + switch (type) {
> + case PACKETJ_TYPE0:
> + if (cond != PACKETJ_CONDITION_CHECK0 ||
> + !amdgpu_jpeg_reg_valid(reg)) {
> + dev_err(adev->dev, "Invalid packet
> [0x%08x]!\n", ib->ptr[i]);
> + return -EINVAL;
> + }
> + break;
> + case PACKETJ_TYPE3:
> + if (cond != PACKETJ_CONDITION_CHECK3 ||
> + !amdgpu_jpeg_reg_valid(reg)) {
> + dev_err(adev->dev, "Invalid packet
> [0x%08x]!\n", ib->ptr[i]);
> + return -EINVAL;
> + }
> + break;
> + case PACKETJ_TYPE6:
> + if (ib->ptr[i] == CP_PACKETJ_NOP)
> + continue;
> + dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib-
> >ptr[i]);
> + return -EINVAL;
> + default:
> + dev_err(adev->dev, "Unknown packet type %d !\n",
> type);
> + return -EINVAL;
> + }
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
> index 4f0775e39b54..346ae0ab09d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
> @@ -25,11 +25,18 @@
> #define __AMDGPU_JPEG_H__
>
> #include "amdgpu_ras.h"
> +#include "amdgpu_cs.h"
>
> #define AMDGPU_MAX_JPEG_INSTANCES 4
> #define AMDGPU_MAX_JPEG_RINGS 10
> #define AMDGPU_MAX_JPEG_RINGS_4_0_3 8
>
> +#define JPEG_REG_RANGE_START 0x4000
> +#define JPEG_REG_RANGE_END 0x41c2
> +#define JPEG_ATOMIC_RANGE_START 0x4120
> +#define JPEG_ATOMIC_RANGE_END 0x412A
> +
> +
> #define AMDGPU_JPEG_HARVEST_JPEG0 (1 << 0) #define
> AMDGPU_JPEG_HARVEST_JPEG1 (1 << 1)
>
> @@ -170,5 +177,8 @@ int amdgpu_jpeg_reg_dump_init(struct
> amdgpu_device *adev,
> const struct amdgpu_hwip_reg_entry *reg, u32
> count); void amdgpu_jpeg_dump_ip_state(struct amdgpu_ip_block
> *ip_block); void amdgpu_jpeg_print_ip_state(struct amdgpu_ip_block
> *ip_block, struct drm_printer *p);
> +int amdgpu_jpeg_dec_parse_cs(struct amdgpu_cs_parser *parser,
> + struct amdgpu_job *job,
> + struct amdgpu_ib *ib);
>
> #endif /*__AMDGPU_JPEG_H__*/
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> index 58239c405fda..27c76bd424cf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> @@ -23,7 +23,6 @@
>
> #include "amdgpu.h"
> #include "amdgpu_jpeg.h"
> -#include "amdgpu_cs.h"
> #include "amdgpu_pm.h"
> #include "soc15.h"
> #include "soc15d.h"
> @@ -806,7 +805,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v2_0_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v2_0_dec_ring_get_rptr,
> .get_wptr = jpeg_v2_0_dec_ring_get_wptr,
> .set_wptr = jpeg_v2_0_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + @@ -854,58
> +853,3 @@ const struct amdgpu_ip_block_version jpeg_v2_0_ip_block = {
> .rev = 0,
> .funcs = &jpeg_v2_0_ip_funcs,
> };
> -
> -/**
> - * jpeg_v2_dec_ring_parse_cs - command submission parser
> - *
> - * @parser: Command submission parser context
> - * @job: the job to parse
> - * @ib: the IB to parse
> - *
> - * Parse the command stream, return -EINVAL for invalid packet,
> - * 0 otherwise
> - */
> -int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,
> - struct amdgpu_job *job,
> - struct amdgpu_ib *ib)
> -{
> - u32 i, reg, res, cond, type;
> - struct amdgpu_device *adev = parser->adev;
> -
> - for (i = 0; i < ib->length_dw ; i += 2) {
> - reg = CP_PACKETJ_GET_REG(ib->ptr[i]);
> - res = CP_PACKETJ_GET_RES(ib->ptr[i]);
> - cond = CP_PACKETJ_GET_COND(ib->ptr[i]);
> - type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);
> -
> - if (res) /* only support 0 at the moment */
> - return -EINVAL;
> -
> - switch (type) {
> - case PACKETJ_TYPE0:
> - if (cond != PACKETJ_CONDITION_CHECK0 || reg <
> JPEG_REG_RANGE_START ||
> - reg > JPEG_REG_RANGE_END) {
> - dev_err(adev->dev, "Invalid packet
> [0x%08x]!\n", ib->ptr[i]);
> - return -EINVAL;
> - }
> - break;
> - case PACKETJ_TYPE3:
> - if (cond != PACKETJ_CONDITION_CHECK3 || reg <
> JPEG_REG_RANGE_START ||
> - reg > JPEG_REG_RANGE_END) {
> - dev_err(adev->dev, "Invalid packet
> [0x%08x]!\n", ib->ptr[i]);
> - return -EINVAL;
> - }
> - break;
> - case PACKETJ_TYPE6:
> - if (ib->ptr[i] == CP_PACKETJ_NOP)
> - continue;
> - dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib-
> >ptr[i]);
> - return -EINVAL;
> - default:
> - dev_err(adev->dev, "Unknown packet type %d !\n",
> type);
> - return -EINVAL;
> - }
> - }
> -
> - return 0;
> -}
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> index 63fadda7a673..654e43e83e2c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> @@ -45,9 +45,6 @@
>
> #define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR
> 0x18000
>
> -#define JPEG_REG_RANGE_START
> 0x4000
> -#define JPEG_REG_RANGE_END
> 0x41c2
> -
> void jpeg_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring); void
> jpeg_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring); void
> jpeg_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
> @@ -60,9 +57,6 @@ void jpeg_v2_0_dec_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
> unsigned vmid, uint64_t pd_addr);
> void jpeg_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
> uint32_t val); void jpeg_v2_0_dec_ring_nop(struct amdgpu_ring *ring,
> uint32_t count); -int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser
> *parser,
> - struct amdgpu_job *job,
> - struct amdgpu_ib *ib);
>
> extern const struct amdgpu_ip_block_version jpeg_v2_0_ip_block;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> index 3e2c389242db..20983f126b49 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> @@ -696,7 +696,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v2_5_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v2_5_dec_ring_get_rptr,
> .get_wptr = jpeg_v2_5_dec_ring_get_wptr,
> .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + @@ -727,7
> +727,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v2_6_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v2_5_dec_ring_get_rptr,
> .get_wptr = jpeg_v2_5_dec_ring_get_wptr,
> .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + diff --git
> a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> index a44eb2667664..d1a011c40ba2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> @@ -597,7 +597,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v3_0_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v3_0_dec_ring_get_rptr,
> .get_wptr = jpeg_v3_0_dec_ring_get_wptr,
> .set_wptr = jpeg_v3_0_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + diff --git
> a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> index da3ee69f1a3b..33db2c1ae6cc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> @@ -762,7 +762,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v4_0_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v4_0_dec_ring_get_rptr,
> .get_wptr = jpeg_v4_0_dec_ring_get_wptr,
> .set_wptr = jpeg_v4_0_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + diff --git
> a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> index a78144773fab..aae7328973d1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> @@ -1177,7 +1177,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v4_0_3_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v4_0_3_dec_ring_get_rptr,
> .get_wptr = jpeg_v4_0_3_dec_ring_get_wptr,
> .set_wptr = jpeg_v4_0_3_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + diff --git
> a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> index 481d1a2dbe5a..e0fdbacbde09 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> @@ -807,7 +807,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v4_0_5_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v4_0_5_dec_ring_get_rptr,
> .get_wptr = jpeg_v4_0_5_dec_ring_get_wptr,
> .set_wptr = jpeg_v4_0_5_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + diff --git
> a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> index e0a71909252b..1bb09d85eb5b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> @@ -683,7 +683,7 @@ static const struct amdgpu_ring_funcs
> jpeg_v5_0_0_dec_ring_vm_funcs = {
> .get_rptr = jpeg_v5_0_0_dec_ring_get_rptr,
> .get_wptr = jpeg_v5_0_0_dec_ring_get_wptr,
> .set_wptr = jpeg_v5_0_0_dec_ring_set_wptr,
> - .parse_cs = jpeg_v2_dec_ring_parse_cs,
> + .parse_cs = amdgpu_jpeg_dec_parse_cs,
> .emit_frame_size =
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
> --
> 2.48.1
