From: Dillon Varone <dillon.var...@amd.com>

[WHY&HOW]
dc_post_update_surfaces_to_stream needs to be called after a full update
completes in order to optimize clocks and watermarks for power. Add
missing calls before idle entry is requested to ensure optimal power.

Reviewed-by: Aurabindo Pillai <aurabindo.pil...@amd.com>
Signed-off-by: Dillon Varone <dillon.var...@amd.com>
Signed-off-by: Ivan Lipski <ivan.lip...@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c      | 3 +--
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 8 ++++++--
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 9dd2d1ed674d..b7b933a33316 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -417,8 +417,7 @@ static inline bool update_planes_and_stream_adapter(struct 
dc *dc,
        /*
         * Previous frame finished and HW is ready for optimization.
         */
-       if (update_type == UPDATE_TYPE_FAST)
-               dc_post_update_surfaces_to_stream(dc);
+       dc_post_update_surfaces_to_stream(dc);
 
        return dc_update_planes_and_stream(dc,
                                           array_of_surface_update,
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index 466dccb355d7..1ec9d03ad747 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -218,8 +218,10 @@ static void amdgpu_dm_idle_worker(struct work_struct *work)
                        break;
                }
 
-               if (idle_work->enable)
+               if (idle_work->enable) {
+                       dc_post_update_surfaces_to_stream(idle_work->dm->dc);
                        dc_allow_idle_optimizations(idle_work->dm->dc, true);
+               }
                mutex_unlock(&idle_work->dm->dc_lock);
        }
        idle_work->dm->idle_workqueue->running = false;
@@ -273,8 +275,10 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct 
work_struct *work)
                        vblank_work->acrtc->dm_irq_params.allow_sr_entry);
        }
 
-       if (dm->active_vblank_irq_count == 0)
+       if (dm->active_vblank_irq_count == 0) {
+               dc_post_update_surfaces_to_stream(dm->dc);
                dc_allow_idle_optimizations(dm->dc, true);
+       }
 
        mutex_unlock(&dm->dc_lock);
 
-- 
2.43.0

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