[PATCH 08/20] drm/amd/display: Fix for test crash due to power gating

[IVAN.LIPSKI]

From: Sridevi Arvindekar <sarvi...@amd.com>

[Why/How]
Call power gating routine only if it is defined.

Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Signed-off-by: Sridevi Arvindekar <sarvi...@amd.com>
Signed-off-by: Ivan Lipski <ivan.lip...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index 417f2679723e..95af58cbb92a 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -3131,7 +3131,8 @@ void dcn20_fpga_init_hw(struct dc *dc)
                res_pool->dccg->funcs->dccg_init(res_pool->dccg);
 
        //Enable ability to power gate / don't force power on permanently
-       hws->funcs.enable_power_gating_plane(hws, true);
+       if (hws->funcs.enable_power_gating_plane)
+               hws->funcs.enable_power_gating_plane(hws, true);
 
        // Specific to FPGA dccg and registers
        REG_WRITE(RBBMIF_TIMEOUT_DIS, 0xFFFFFFFF);
-- 
2.43.0