On Wed, Sep 10, 2025 at 4:39 PM Mario Limonciello
<mario.limoncie...@amd.com> wrote:
>
> [Why]
> When kernel documentation is generated the enum values themselves don't
> end up in the documentation. This makes browsing them in HTML a lot
> less useful.
>
> [How]
> Copy DC_DEBUG_MASK and DC_FEATURE_MASK enum values into matching kdoc
> comments.
>
> Signed-off-by: Mario Limonciello <mario.limoncie...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> Documentation/gpu/amdgpu/driver-core.rst | 2 +-
> drivers/gpu/drm/amd/include/amd_shared.h | 98 ++++++++++++++++--------
> 2 files changed, 67 insertions(+), 33 deletions(-)
>
> diff --git a/Documentation/gpu/amdgpu/driver-core.rst
> b/Documentation/gpu/amdgpu/driver-core.rst
> index bd4be32f2725..3ce276272171 100644
> --- a/Documentation/gpu/amdgpu/driver-core.rst
> +++ b/Documentation/gpu/amdgpu/driver-core.rst
> @@ -210,4 +210,4 @@ IP Blocks
> :doc: IP Blocks
>
> .. kernel-doc:: drivers/gpu/drm/amd/include/amd_shared.h
> - :identifiers: amd_ip_block_type amd_ip_funcs DC_DEBUG_MASK
> + :identifiers: amd_ip_block_type amd_ip_funcs DC_FEATURE_MASK DC_DEBUG_MASK
> diff --git a/drivers/gpu/drm/amd/include/amd_shared.h
> b/drivers/gpu/drm/amd/include/amd_shared.h
> index bfb446736ca8..75efda2969cf 100644
> --- a/drivers/gpu/drm/amd/include/amd_shared.h
> +++ b/drivers/gpu/drm/amd/include/amd_shared.h
> @@ -239,18 +239,51 @@ enum amd_harvest_ip_mask {
> AMD_HARVEST_IP_DMU_MASK = 0x4,
> };
>
> +/**
> + * enum DC_FEATURE_MASK - Bits that control DC feature defaults
> + */
> enum DC_FEATURE_MASK {
> //Default value can be found at "uint amdgpu_dc_feature_mask"
> - DC_FBC_MASK = (1 << 0), //0x1, disabled by default
> - DC_MULTI_MON_PP_MCLK_SWITCH_MASK = (1 << 1), //0x2, enabled by default
> - DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2), //0x4, disabled by default
> - DC_PSR_MASK = (1 << 3), //0x8, disabled by default for dcn < 3.1
> - DC_EDP_NO_POWER_SEQUENCING = (1 << 4), //0x10, disabled by default
> - DC_DISABLE_LTTPR_DP1_4A = (1 << 5), //0x20, disabled by default
> - DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default
> - DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default
> - DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default
> - DC_REPLAY_MASK = (1 << 9), //0x200, disabled by default for dcn <
> 3.1.4
> + /**
> + * @DC_FBC_MASK: (0x1) disabled by default
> + */
> + DC_FBC_MASK = (1 << 0),
> + /**
> + * @DC_MULTI_MON_PP_MCLK_SWITCH_MASK: (0x2) enabled by default
> + */
> + DC_MULTI_MON_PP_MCLK_SWITCH_MASK = (1 << 1),
> + /**
> + * @DC_DISABLE_FRACTIONAL_PWM_MASK: (0x4) disabled by default
> + */
> + DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2),
> + /**
> + * @DC_PSR_MASK: (0x8) disabled by default for DCN < 3.1
> + */
> + DC_PSR_MASK = (1 << 3),
> + /**
> + * @DC_EDP_NO_POWER_SEQUENCING: (0x10) disabled by default
> + */
> + DC_EDP_NO_POWER_SEQUENCING = (1 << 4),
> + /**
> + * @DC_DISABLE_LTTPR_DP1_4A: (0x20) disabled by default
> + */
> + DC_DISABLE_LTTPR_DP1_4A = (1 << 5),
> + /**
> + * @DC_DISABLE_LTTPR_DP2_0: (0x40) disabled by default
> + */
> + DC_DISABLE_LTTPR_DP2_0 = (1 << 6),
> + /**
> + * @DC_PSR_ALLOW_SMU_OPT: (0x80) disabled by default
> + */
> + DC_PSR_ALLOW_SMU_OPT = (1 << 7),
> + /**
> + * @DC_PSR_ALLOW_MULTI_DISP_OPT: (0x100) disabled by default
> + */
> + DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8),
> + /**
> + * @DC_REPLAY_MASK: (0x200) disabled by default for DCN < 3.1.4
> + */
> + DC_REPLAY_MASK = (1 << 9),
> };
>
> /**
> @@ -258,64 +291,64 @@ enum DC_FEATURE_MASK {
> */
> enum DC_DEBUG_MASK {
> /**
> - * @DC_DISABLE_PIPE_SPLIT: If set, disable pipe-splitting
> + * @DC_DISABLE_PIPE_SPLIT: (0x1) If set, disable pipe-splitting
> */
> DC_DISABLE_PIPE_SPLIT = 0x1,
>
> /**
> - * @DC_DISABLE_STUTTER: If set, disable memory stutter mode
> + * @DC_DISABLE_STUTTER: (0x2) If set, disable memory stutter mode
> */
> DC_DISABLE_STUTTER = 0x2,
>
> /**
> - * @DC_DISABLE_DSC: If set, disable display stream compression
> + * @DC_DISABLE_DSC: (0x4) If set, disable display stream compression
> */
> DC_DISABLE_DSC = 0x4,
>
> /**
> - * @DC_DISABLE_CLOCK_GATING: If set, disable clock gating
> optimizations
> + * @DC_DISABLE_CLOCK_GATING: (0x8) If set, disable clock gating
> optimizations
> */
> DC_DISABLE_CLOCK_GATING = 0x8,
>
> /**
> - * @DC_DISABLE_PSR: If set, disable Panel self refresh v1 and PSR-SU
> + * @DC_DISABLE_PSR: (0x10) If set, disable Panel self refresh v1 and
> PSR-SU
> */
> DC_DISABLE_PSR = 0x10,
>
> /**
> - * @DC_FORCE_SUBVP_MCLK_SWITCH: If set, force mclk switch in subvp,
> even
> + * @DC_FORCE_SUBVP_MCLK_SWITCH: (0x20) If set, force mclk switch in
> subvp, even
> * if mclk switch in vblank is possible
> */
> DC_FORCE_SUBVP_MCLK_SWITCH = 0x20,
>
> /**
> - * @DC_DISABLE_MPO: If set, disable multi-plane offloading
> + * @DC_DISABLE_MPO: (0x40) If set, disable multi-plane offloading
> */
> DC_DISABLE_MPO = 0x40,
>
> /**
> - * @DC_ENABLE_DPIA_TRACE: If set, enable trace logging for DPIA
> + * @DC_ENABLE_DPIA_TRACE: (0x80) If set, enable trace logging for DPIA
> */
> DC_ENABLE_DPIA_TRACE = 0x80,
>
> /**
> - * @DC_ENABLE_DML2: If set, force usage of DML2, even if the DCN
> version
> + * @DC_ENABLE_DML2: (0x100) If set, force usage of DML2, even if the
> DCN version
> * does not default to it.
> */
> DC_ENABLE_DML2 = 0x100,
>
> /**
> - * @DC_DISABLE_PSR_SU: If set, disable PSR SU
> + * @DC_DISABLE_PSR_SU: (0x200) If set, disable PSR SU
> */
> DC_DISABLE_PSR_SU = 0x200,
>
> /**
> - * @DC_DISABLE_REPLAY: If set, disable Panel Replay
> + * @DC_DISABLE_REPLAY: (0x400) If set, disable Panel Replay
> */
> DC_DISABLE_REPLAY = 0x400,
>
> /**
> - * @DC_DISABLE_IPS: If set, disable all Idle Power States, all the
> time.
> + * @DC_DISABLE_IPS: (0x800) If set, disable all Idle Power States,
> all the time.
> * If more than one IPS debug bit is set, the lowest bit takes
> * precedence. For example, if DC_FORCE_IPS_ENABLE and
> * DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes
> @@ -324,56 +357,57 @@ enum DC_DEBUG_MASK {
> DC_DISABLE_IPS = 0x800,
>
> /**
> - * @DC_DISABLE_IPS_DYNAMIC: If set, disable all IPS, all the time,
> + * @DC_DISABLE_IPS_DYNAMIC: (0x1000) If set, disable all IPS, all the
> time,
> * *except* when driver goes into suspend.
> */
> DC_DISABLE_IPS_DYNAMIC = 0x1000,
>
> /**
> - * @DC_DISABLE_IPS2_DYNAMIC: If set, disable IPS2 (IPS1 allowed) if
> + * @DC_DISABLE_IPS2_DYNAMIC: (0x2000) If set, disable IPS2 (IPS1
> allowed) if
> * there is an enabled display. Otherwise, enable all IPS.
> */
> DC_DISABLE_IPS2_DYNAMIC = 0x2000,
>
> /**
> - * @DC_FORCE_IPS_ENABLE: If set, force enable all IPS, all the time.
> + * @DC_FORCE_IPS_ENABLE: (0x4000) If set, force enable all IPS, all
> the time.
> */
> DC_FORCE_IPS_ENABLE = 0x4000,
> /**
> - * @DC_DISABLE_ACPI_EDID: If set, don't attempt to fetch EDID for
> + * @DC_DISABLE_ACPI_EDID: (0x8000) If set, don't attempt to fetch
> EDID for
> * eDP display from ACPI _DDC method.
> */
> DC_DISABLE_ACPI_EDID = 0x8000,
>
> /**
> - * @DC_DISABLE_HDMI_CEC: If set, disable HDMI-CEC feature in amdgpu
> driver.
> + * @DC_DISABLE_HDMI_CEC: (0x10000) If set, disable HDMI-CEC feature
> in amdgpu driver.
> */
> DC_DISABLE_HDMI_CEC = 0x10000,
>
> /**
> - * @DC_DISABLE_SUBVP_FAMS: If set, disable DCN Sub-Viewport &
> Firmware Assisted
> + * @DC_DISABLE_SUBVP_FAMS: (0x20000) If set, disable DCN Sub-Viewport
> & Firmware Assisted
> * Memory Clock Switching (FAMS) feature in amdgpu driver.
> */
> DC_DISABLE_SUBVP_FAMS = 0x20000,
> /**
> - * @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: If set, disable support for
> custom brightness curves
> + * @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: (0x40000) If set, disable
> support for custom
> + * brightness curves
> */
> DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE = 0x40000,
>
> /**
> - * @DC_HDCP_LC_FORCE_FW_ENABLE: If set, use HDCP Locality Check FW
> + * @DC_HDCP_LC_FORCE_FW_ENABLE: (0x80000) If set, use HDCP Locality
> Check FW
> * path regardless of reported HW capabilities.
> */
> DC_HDCP_LC_FORCE_FW_ENABLE = 0x80000,
>
> /**
> - * @DC_HDCP_LC_ENABLE_SW_FALLBACK: If set, upon HDCP Locality Check FW
> + * @DC_HDCP_LC_ENABLE_SW_FALLBACK: (0x100000) If set, upon HDCP
> Locality Check FW
> * path failure, retry using legacy SW path.
> */
> DC_HDCP_LC_ENABLE_SW_FALLBACK = 0x100000,
>
> /**
> - * @DC_SKIP_DETECTION_LT: If set, skip detection link training
> + * @DC_SKIP_DETECTION_LT: (0x200000) If set, skip detection link
> training
> */
> DC_SKIP_DETECTION_LT = 0x200000,
> };
> --
> 2.50.1
>
