On 9/19/25 17:09, Alex Deucher wrote:
On Fri, Sep 19, 2025 at 4:14 AM Timur Kristóf <[email protected]> wrote:
Mark YUV422 unsupported over DP on DCE to work around a
regression caused by the recent YUV422 fallback patch.
See https://gitlab.freedesktop.org/drm/amd/-/issues/4585
The recent YUV422 fallback breaks DisplayPort on DCE6-10 because
it can select a high refresh rate mode with YUV422 and 6 BPC,
which is apparently not actually supported by the HW, causing
it to boot to a "no signal" screen.
Tested with a Samsung Odyssey G7 on the following GPUs:
- Cape Verde (DCE 6): affected
- Tonga (DCE 10): affected
- Polaris (DCE 11.2): not affected
- Vega (DCE 12): not affected
Polaris and Vega are not affected because the same mode
gets rejected by other parts of the code base, possibly the
bandwidth calculation which exists for DCE11+ but not older HW.
It is not documented whether YUV422 is actually supported over DP
on DCE, but considering that this encoding was never used before,
and that YUV420 is already marked unsupported, probably not.
Signed-off-by: Timur Kristóf <[email protected]>
Fixes: db291ed1732e02 ("drm/amd/display: Add fallback path for YCBCR422")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4585
Acked-by: Alex Deucher <[email protected]>
Would be good to get feedback from the display team on what the actual
capabilities are, but seems reasonable to me.
Alex
Please disregard this patch.
I will send a different patch which will instead reject modes that would
require a pixel clock higher than the maximum display clock.
Thanks,
Timur
