On 10/21, Lazar, Lijo wrote: > > > On 10/21/2025 1:08 AM, Rodrigo Siqueira wrote: > > When using UMR, a dashboard is available that displays the CPC, CPF, > > CPG, TCP, and UTCL utilization. This commit introduces the meanings of > > those acronyms (and others) to the glossary to improve the comprehension > > of the UMR dashboard. > > > > Cc: Alex Deucher <[email protected]> > > Cc: Christian König <[email protected]> > > Cc: Timur Kristóf <[email protected]> > > Signed-off-by: Rodrigo Siqueira <[email protected]> > > --- > > Documentation/gpu/amdgpu/amdgpu-glossary.rst | 21 ++++++++++++++++++++ > > 1 file changed, 21 insertions(+) > > > > diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > index 30812d9d53c6..eb72e6f6d4f1 100644 > > --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > > @@ -30,6 +30,15 @@ we have a dedicated glossary for Display Core at > > CP > > Command Processor > > + CPC > > + Command Processor Compute > > + > > + CPF > > + Command Processor Fetch > > + > > + CPG > > + Command Processor Graphics > > + > > CPLIB > > Content Protection Library > > @@ -78,6 +87,9 @@ we have a dedicated glossary for Display Core at > > GMC > > Graphic Memory Controller > > + GPR > > + General Purpose Register > > + > > GPUVM > > GPU Virtual Memory. This is the GPU's MMU. The GPU supports > > multiple > > virtual address spaces that can be in flight at any given time. > > These > > @@ -92,6 +104,9 @@ we have a dedicated glossary for Display Core at > > table for use by the kernel driver or into per process GPUVM page > > tables > > for application usage. > > + GWS > > + Global Wave Syncs > > Sync (s is not there).
I'll fix it in the V4. > > + > > IH > > Interrupt Handler > > @@ -206,12 +221,18 @@ we have a dedicated glossary for Display Core at > > TC > > Texture Cache > > + TCP (AMDGPU) > > + Texture Cache Processing > > Texture Cache per Pipe - terminology used for L1 cache in old architecture. Alex, Lijo, How about the following modification for the V4: TCP (AMDGPU) Texture Cache per Pipe. Even though the name "Texture" is part of this acronym, the TCP represents the path to memory shaders; i.e., it is not related to texture. The name is a leftover from older designs where shader stages had different cache designs; it refers to the L1 cache in older architectures. > > > + > > TOC > > Table of Contents > > UMSCH > > User Mode Scheduler > > + UTCL > > + Universal Texture Cache Line > > Unified Translation Cache - equivalent of TLB. Has multiple levels, hence L > may be dropped. How about the following modification for the V4: UTC (AMDGPU) Unified Translation Cache. UTC is equivalent to TLB. You might see a variation of this acronym with L at the end, i.e., UTCL followed by a number; L means the cache level (e.g., UTCL1 and UTCL2). The reason that I kept the L explanation is that UTCL appears in some parts of the code and also in the UMR gui. Keeping this acronym here can facilitate code searches and also provide some extra background on the L part. Is it ok for you? Thanks Alex/Lijo. > > Thanks, > Lijo > > > + > > UVD > > Unified Video Decoder > -- Rodrigo Siqueira
